Události

22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2019

Doubletree by Hilton hotel, 9-13 Sindicatelor Street, Cluj, 400029, Romania 24.-26.4.2019

Programový výbor (členové z FIT)

Růžička Richard, doc. Ing., Ph.D., MBA, UPSY FIT VUT
Sekanina Lukáš, prof. Ing., Ph.D., UPSY FIT VUT
Zachariášová Marcela, Ing., Ph.D., UPSY FIT VUT

Řídící výbor (členové z FIT)

Sekanina Lukáš, prof. Ing., Ph.D., UPSY FIT VUT

Vybrané publikace

2019FUKAČ Tomáš a KOŘENEK Jan. Hash-based Pattern Matching for High Speed Networks. In: 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Cluj-Napoca: Institute of Electrical and Electronics Engineers, 2019, s. 1-5. ISBN 978-1-72810-073-9.
 SZURMAN Karel a KOTÁSEK Zdeněk. Run-Time Reconfigurable Fault Tolerant Architecture for Soft-Core Processor neo430. In: 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2019). Cluj-Napoca: IEEE Computer Society, 2019, s. 136-140. ISBN 978-1-72810-072-2.
 VRÁNA Roman a KOŘENEK Jan. Acceleration of Feature Extraction for Real-Time Analysis of Encrypted Network Traffic. In: 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Cluj-Napoca: Institute of Electrical and Electronics Engineers, 2019, s. 1-6. ISBN 978-1-72810-073-9.

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