Events

The 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems

Krakow 11.-13.4.2007

Programme Committee (members from FIT)

Kotásek Zdeněk, doc. Ing., CSc., UPSY FIT VUT
Sekanina Lukáš, prof. Ing., Ph.D., UPSY FIT VUT

Steering Committee (members from FIT)

Kotásek Zdeněk, doc. Ing., CSc., UPSY FIT VUT

Section moderators (members from FIT)

Kotásek Zdeněk, doc. Ing., CSc., UPSY FIT VUT
Sekanina Lukáš, prof. Ing., Ph.D., UPSY FIT VUT

Selected publications

2007KOŘENEK Jan and KOBIERSKÝ Petr. Intrusion Detection System Intended for Multigigabit Networks. In: 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems. Krakow: IEEE Computer Society, 2007, pp. 361-364. ISBN 978-1-4244-1161-0.
 MARTÍNEK Tomáš, LEXA Matej, BECK Patrik and FUČÍK Otto. Automatic Generation of Circuits for Approximate String Matching. In: 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems. Krakow: IEEE Computer Society, 2007, pp. 203-208. ISBN 1-4244-1161-0.
 SEKANINA Lukáš. Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates. In: 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Gliwice: IEEE Computer Society, 2007, pp. 243-246. ISBN 1424411610.

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