Events

19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2016

Košice 20.-22.4.2016

Programme Committee (members from FIT)

Kotásek Zdeněk, doc. Ing., CSc., UPSY FIT VUT
Růžička Richard, doc. Ing., Ph.D., MBA, UPSY FIT VUT
Sekanina Lukáš, prof. Ing., Ph.D., UPSY FIT VUT

Steering Committee (members from FIT)

Sekanina Lukáš, prof. Ing., Ph.D., UPSY FIT VUT

Section moderators (members from FIT)

Sekanina Lukáš, prof. Ing., Ph.D., UPSY FIT VUT, Keynote III

Speakers

Sekanina Lukáš, prof. Ing., Ph.D., UPSY FIT VUT
Strnadel Josef, Ing., Ph.D., UPSY FIT VUT

Participants

Sekanina Lukáš, prof. Ing., Ph.D., UPSY FIT VUT
Strnadel Josef, Ing., Ph.D., UPSY FIT VUT

Selected publications

2016SEKANINA Lukáš. Introduction to Approximate Computing: Embedded Tutorial. In: 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Košice: Institute of Electrical and Electronics Engineers, 2016, pp. 90-95. ISBN 978-1-5090-2467-4.
 STRNADEL Josef. Modeling and Analysis of Fault-Tolerant Systems by Means of UPPAAL SMC: Method and Benefits. In: Informal Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Bratislava: Slovak University of Technology in Bratislava, 2016, pp. 32-37. ISBN 978-80-8086-256-5.

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