Reduced Certification Costs Using Trusted Multi-core Platforms

Hlavní řešitel:Zemčík Pavel
Spoluřešitelé:Smrž Pavel
Další řešitelé:Ševcovic Jiří
Agentura:Artemis JU
Kód:100202 - RECOMP
Začátek:2010
Konec:2013
Soubory: 
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Klíčová slova:multi-core platforms, certification
Anotace:
The RECOMP (Reduced certification cost for trusted multi-core platforms) research project will establish methods, tools and platforms for enabling cost-efficient certification and re-certification of safety-critical systems and mixed-criticality systems, i.e. systems containing safety-critical and nonsafety-
critical components.
RECOMP recognizes the fact that the increasing processing power of embedded systems is mainly provided by increasing the number of processing cores. The increased numbers of cores is commonly
regarded as a design challenge in the safety-critical area, as there are no established approaches to achieve certification.
At the same time there is an increased need for flexibility in the products in the safety-critical market.
This need for flexibility puts new requirements on the customization and the upgradability of both the non-safety and safety-critical critical part. The difficulty with this is the large cost in both effort and money of the re-certification of the modified software, which means that companies cannot fully leverage the advantages of modular software system.
RECOMP will provide reference designs and platform architectures together with the required design methods and tools for achieving cost-effective certification and re-certification of mixed-criticality,
component based, multi-core systems. The aim of RECOMP is to define a European standard reference technology for mixed-criticality multi-core systems supported by the European tool vendors participating in RECOMP.
The RECOMP project will bring clear benefits in terms of cross-domain implementations of mixed criticality systems in all domains addressed by project participants: automotive systems, aerospace
systems, industrial control systems, lifts and transportation systems.
RECOMP will thus provide solutions that will allow European industry to increase its market share in the growing market of mixed-criticality systems.

Produkty

2012HAVEN: Otevřený rámec pro akceleraci funkční verifikace hardwaru pomocí FPGA, software, 2012
Autoři: Šimková Marcela, Lengál Ondřej, Kajan Michal
2010Software pro řízení servosystémů pro divadelní prostředí, software, 2010
Autoři: Ševcovic Jiří, Zemčík Pavel

Publikace

2013STRAKA Martin, KAŠTIL Jan, KOTÁSEK Zdeněk a MIČULKA Lukáš. Fault Tolerant System Design and SEU Injection Based Testing. Microprocessors and Microsystems. Amsterdam: Elsevier Science, 2013, roč. 2013, č. 37, s. 155-173. ISSN 0141-9331.
 STRNADEL Josef. Load-Adaptive Monitor-Driven Hardware for Preventing Embedded Real-Time Systems from Overloads Caused by Excessive Interrupt Rates. In: Architecture of Computing Systems - ARCS 2013. Berlin: Springer Verlag, 2013, s. 98-109. ISBN 978-3-642-36423-5. ISSN 0302-9743.
 STRNADEL Josef. On Design of Priority-Driven Load-Adaptive Monitoring-Based Hardware for Managing Interrupts in Embedded Event-Triggered Real-Time Systems. In: Proceedings of the IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Brno: IEEE Computer Society, 2013, s. 24-29. ISBN 978-1-4673-6133-0.
2012DITTRICH Petr. Identification of Flight Parameters of Light Sport Aircraft. In: Proceedings of the 18th Conference STUDENT EEICT 2012. Brno: Vysoké učení technické v Brně, 2012, s. 464-468. ISBN 978-80-214-4462-1.
 JURÁNEK Roman, HRADIŠ Michal a ZEMČÍK Pavel. Real-time Algorithms of Object Detection using Classifiers. Real-Time System. Rijeka: InTech - Open Access Publisher, 2012, s. 1-22. ISBN 9789535105107.
 KAŠTIL Jan, STRAKA Martin a KOTÁSEK Zdeněk. Methodology for Increasing Reliability of FPGA Design via Partial Reconfiguration. In: The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12). Annecy: Politecnico di Milano, 2012, s. 1-4.
 KAŠTIL Jan, STRAKA Martin, MIČULKA Lukáš a KOTÁSEK Zdeněk. Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA. In: 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools. Cesme-Izmir: IEEE Computer Society, 2012, s. 250-257. ISBN 978-0-7695-4798-5.
 MIČULKA Lukáš a KOTÁSEK Zdeněk. Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System. In: 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools. Cesme-Izmir: IEEE Computer Society, 2012, s. 20-21. ISBN 978-3-902457-33-2.
 STRAKA Martin, KAŠTIL Jan a KOTÁSEK Zdeněk. Methodology for Reliability Analysis of FPGA-based Fault Tolerant Systems. In: CSE'2012 International Scientific Conference on Computer Science and Engineering. Košice: Technická univerzita v Košiciach, 2012, s. 146-153. ISBN 978-80-8143-049-7.
 STRAKA Martin, MIČULKA Lukáš, KAŠTIL Jan a KOTÁSEK Zdeněk. Test Platform for Fault Tolerant Systems Design Qualities Verification. In: 15th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Tallin: IEEE Computer Society, 2012, s. 336-341. ISBN 978-1-4673-1185-4.
 STRNADEL Josef. Monitoring-Driven HW/SW Interrupt Overload Prevention for Embedded Real-Time Systems. In: Proceedings of the 15th International IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). Tallin: IEEE Computer Society, 2012, s. 121-126. ISBN 978-1-4673-1188-5.
 ŠIMKOVÁ Marcela, KAŠTIL Jan a KOTÁSEK Zdeněk. Verification of Fault-tolerant Methodologies for FPGA Systems. In: The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12). Annecy: Politecnico di Milano, 2012, s. 55-58.
 ŠIMKOVÁ Marcela, LENGÁL Ondřej a KAJAN Michal. HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware. Lecture Notes in Computer Science. 2012, roč. 2012, č. 7261, s. 247-253. ISSN 0302-9743.
2011DITTRICH Petr a CHUDÝ Peter. Application of Kalman Filter to oversampled data from Global Position System. ElectroScope. Plzeň: Západočeská univerzita v Plzni, 2011, roč. 2011, č. 2, s. 6. ISSN 1802-4564.
 STRNADEL Josef. Concept of Adaptive Embedded HW/SW Architecture for Dynamic Prevention from Interrupt Overloads. In: Proceedings of the Work in Progress Session held in connection with SEAA 2011, the 37th EUROMICRO Conference on Software Engineering and Advanced Applications and DSD 2011, the 14th EUROMICRO Conference on Digital System Design. Oulu: Johannes Kepler University Linz, 2011, s. 21-22. ISBN 978-3-902457-30-1.
 STRNADEL Josef. Proposal of Flexible Monitoring-Driven HW/SW Interrupt Management for Embedded COTS-Based Event-Triggered Real-Time Systems. In: Proceedings of the Work-in-Progress Session of the 32nd IEEE Real-Time Systems Symposium. Vienna: Technische Universitaet Wien, 2011, s. 29-32.
 ŠIMKOVÁ Marcela, LENGÁL Ondřej a KAJAN Michal. HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware. FIT-TR-2011-05, Brno: Fakulta informačních technologií VUT v Brně, 2011.
 ZEMČÍK Pavel, MARŠÍK Lukáš, ŠIROKÝ Vít, FUČÍK Otto, KORČEK Pavol a ŠUSTEK Jiří. AX32 Low Power Embedded Video Enabled System Using FPGA. In: Proceedings of the 21th Conference on Field Programmable Logic and Applications Workshop. Chania: Institute of Electrical and Electronics Engineers, 2011, s. 2. ISBN 978-0-7695-4529-5.

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