Computer Architecture Research Group

Team members

Drábek Vladimír, doc. Ing., CSc., UPSY FIT VUT
	diagnosis of digital systems fault-tolerant and fail-safe systems design automation with VHDL algorithms of arithmetic calculations applications of finite-field algebra compression and processing of multimedia data graphical and multimedia processors
Dvořák Václav, prof. Ing., DrSc., group leader, UPSY FIT VUT
	Computer architecture Parallel and distributed computing Embedded and configurable systems
Jaroš Jiří, Ing., Ph.D., UPSY FIT VUT
	Parallel and distributed systems General purpose computation on GPU High performance computing Computer architectures Systems on chip Bayesian optimisation algorithms Genetic algorithms
Kořenek Jan, Ing., Ph.D., UPSY FIT VUT
	Hardware acceleration of algorithms using FPGA Time critical algorithms in computer networks: packet classification, pattern matching, longest prefix matching, etc. Netowrk security and monitoring Design of new appliances for high speed networks Embedded systems
Martínek Tomáš, Ing., Ph.D., UPSY FIT VUT
	Bioinformatics Hardware acceleration of algorithms in bioinformatics FPGA Technology High Level Synthesis
Ohlídal Miloš, Ing., VUT v Brně

Šimek Václav, Ing., UPSY FIT VUT

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