// Library = EvoApprox 12x12
// Circuit = mul12x12_216
// Area   (45) = 175
// Delay  (45) = 0.770
// Power  (45) = 0.08
// MAE = 175205.30000
// MSE = 48153393838.20000
// MRE = 44.40 %
// WCE = 827394
// WCRE = 204700 %
// EP = 100.0 %
module mul12x12_216(A, B, O);
  input [11:0] A, B;
  output [23:0] O;
  wire n_1946, n_45, n_44, n_1598, n_46, n_41, n_40, n_43, n_42, n_1758;
  wire n_1590, n_49, n_48, n_2018, n_2019, n_2010, n_2011, n_1684, n_1685, n_1424;
  wire n_30, n_31, n_32, n_33, n_34, n_35, n_36, n_37, n_38, n_39;
  wire n_1952, n_2005, n_47, n_1866, n_1867, n_1693, n_1692, n_1518, n_1519, n_1345;
  wire n_1344, n_23, n_22, n_21, n_20, n_27, n_26, n_25, n_24, n_29;
  wire n_28, n_1510, n_2027, n_2026, n_18, n_19, n_16, n_17, n_14, n_15;
  wire n_12, n_13, n_10, n_11, n_1844, n_1845, n_1859, n_1858, n_1853, n_1852;
  wire n_1259, n_1258, n_1432, n_2041, n_2040, n_72, n_73, n_2032, n_2033, n_1772;
  wire n_1679, n_1678, n_1778, n_1938, n_65, n_64, n_8, n_9, n_4, n_5;
  wire n_6, n_7, n_0, n_1, n_2, n_3, n_1764, n_1924, n_1604, n_1932;
  wire n_2004;
  assign n_0 = A[0];
  assign n_1 = A[0];
  assign n_2 = A[1];
  assign n_3 = A[1];
  assign n_4 = A[2];
  assign n_5 = A[2];
  assign n_6 = A[3];
  assign n_7 = A[3];
  assign n_8 = A[4];
  assign n_9 = A[4];
  assign n_10 = A[5];
  assign n_11 = A[5];
  assign n_12 = A[6];
  assign n_13 = A[6];
  assign n_14 = A[7];
  assign n_15 = A[7];
  assign n_16 = A[8];
  assign n_17 = A[8];
  assign n_18 = A[9];
  assign n_19 = A[9];
  assign n_20 = A[10];
  assign n_21 = A[10];
  assign n_22 = A[11];
  assign n_23 = A[11];
  assign n_24 = B[0];
  assign n_25 = B[0];
  assign n_26 = B[1];
  assign n_27 = B[1];
  assign n_28 = B[2];
  assign n_29 = B[2];
  assign n_30 = B[3];
  assign n_31 = B[3];
  assign n_32 = B[4];
  assign n_33 = B[4];
  assign n_34 = B[5];
  assign n_35 = B[5];
  assign n_36 = B[6];
  assign n_37 = B[6];
  assign n_38 = B[7];
  assign n_39 = B[7];
  assign n_40 = B[8];
  assign n_41 = B[8];
  assign n_42 = B[9];
  assign n_43 = B[9];
  assign n_44 = B[10];
  assign n_45 = B[10];
  assign n_46 = B[11];
  assign n_47 = B[11];
  assign n_48 = ~(n_28 ^ n_28);
  assign n_49 = n_48;
  assign n_64 = ~n_49;
  assign n_65 = n_64;
  assign n_72 = ~n_49;
  assign n_73 = n_72;
  assign n_1258 = n_22 & n_38;
  assign n_1259 = n_1258;
  FAX1 tmp67(.YS(n_1344), .YC(n_1345), .A(n_73), .B(n_1258), .C(n_1259));
  assign n_1424 = n_20 & n_40;
  assign n_1432 = n_22 & n_40;
  assign n_1510 = n_1344 | n_1424;
  HAX1 tmp71(.YS(n_1518), .YC(n_1519), .A(n_1345), .B(n_1432));
  assign n_1590 = n_18 & n_42;
  assign n_1598 = n_20 & n_42;
  assign n_1604 = n_22 & n_42;
  FAX1 tmp75(.YS(n_1678), .YC(n_1679), .A(n_1510), .B(n_1590), .C(n_42));
  FAX1 tmp76(.YS(n_1684), .YC(n_1685), .A(n_1518), .B(n_1598), .C(n_1679));
  FAX1 tmp77(.YS(n_1692), .YC(n_1693), .A(n_1519), .B(n_1604), .C(n_1685));
  assign n_1758 = n_16 & n_44;
  assign n_1764 = n_18 & n_44;
  assign n_1772 = n_20 & n_44;
  assign n_1778 = n_22 & n_44;
  HAX1 tmp82(.YS(n_1844), .YC(n_1845), .A(n_1678), .B(n_1758));
  FAX1 tmp83(.YS(n_1852), .YC(n_1853), .A(n_1684), .B(n_1764), .C(n_1845));
  FAX1 tmp84(.YS(n_1858), .YC(n_1859), .A(n_1692), .B(n_1772), .C(n_1853));
  FAX1 tmp85(.YS(n_1866), .YC(n_1867), .A(n_1693), .B(n_1778), .C(n_1859));
  assign n_1924 = n_14 & n_46;
  assign n_1932 = n_16 & n_46;
  assign n_1938 = n_18 & n_46;
  assign n_1946 = n_20 & n_46;
  assign n_1952 = n_22 & n_46;
  assign n_2004 = n_65 | n_44;
  assign n_2005 = n_2004;
  FAX1 tmp93(.YS(n_2010), .YC(n_2011), .A(n_1844), .B(n_1924), .C(n_2005));
  FAX1 tmp94(.YS(n_2018), .YC(n_2019), .A(n_1852), .B(n_1932), .C(n_2011));
  FAX1 tmp95(.YS(n_2026), .YC(n_2027), .A(n_1858), .B(n_1938), .C(n_2019));
  FAX1 tmp96(.YS(n_2032), .YC(n_2033), .A(n_1866), .B(n_1946), .C(n_2027));
  FAX1 tmp97(.YS(n_2040), .YC(n_2041), .A(n_1867), .B(n_1952), .C(n_2033));
  assign O[0] = n_2;
  assign O[1] = n_44;
  assign O[2] = n_6;
  assign O[3] = n_16;
  assign O[4] = n_10;
  assign O[5] = n_36;
  assign O[6] = n_30;
  assign O[7] = n_8;
  assign O[8] = n_65;
  assign O[9] = n_28;
  assign O[10] = n_6;
  assign O[11] = n_1344;
  assign O[12] = n_26;
  assign O[13] = n_36;
  assign O[14] = n_14;
  assign O[15] = n_40;
  assign O[16] = n_18;
  assign O[17] = n_12;
  assign O[18] = n_2010;
  assign O[19] = n_2018;
  assign O[20] = n_2026;
  assign O[21] = n_2032;
  assign O[22] = n_2040;
  assign O[23] = n_2041;
endmodule