// Library = EvoApprox 12x12 // Circuit = mul12x12_230 // Area (45) = 114 // Delay (45) = 0.590 // Power (45) = 0.04 // MAE = 393076.30000 // MSE = 241689568143.10001 // MRE = 82.66 % // WCE = 1608785 // WCRE = 3276700 % // EP = 100.0 % module mul12x12_230(A, B, O); input [11:0] A, B; output [23:0] O; wire n_948, n_45, n_44, n_1114, n_46, n_41, n_40, n_43, n_42, n_48; wire n_1286, n_1280, n_1281, n_1682, n_1683, n_954, n_2008, n_30, n_31, n_794; wire n_33, n_34, n_35, n_36, n_37, n_38, n_39, n_1295, n_1294, n_47; wire n_1900, n_23, n_22, n_21, n_20, n_27, n_26, n_25, n_24, n_29; wire n_28, n_121, n_120, n_2022, n_1275, n_18, n_19, n_16, n_17, n_14; wire n_3, n_12, n_13, n_10, n_11, n_2029, n_884, n_2028, n_1651, n_1650; wire n_1659, n_1658, n_15, n_1912, n_1913, n_730, n_105, n_104, n_1664, n_2034; wire n_2041, n_2040, n_2035, n_1906, n_1901, n_808, n_1792, n_960, n_1677, n_1676; wire n_800, n_1671, n_1670, n_286, n_287, n_1460, n_1461, n_8, n_9, n_4; wire n_5, n_6, n_7, n_0, n_1, n_2, n_1274, n_1927, n_1926, n_1920; wire n_878, n_32, n_54, n_55, n_795, n_1478; assign n_0 = A[0]; assign n_1 = A[0]; assign n_2 = A[1]; assign n_3 = A[1]; assign n_4 = A[2]; assign n_5 = A[2]; assign n_6 = A[3]; assign n_7 = A[3]; assign n_8 = A[4]; assign n_9 = A[4]; assign n_10 = A[5]; assign n_11 = A[5]; assign n_12 = A[6]; assign n_13 = A[6]; assign n_14 = A[7]; assign n_15 = A[7]; assign n_16 = A[8]; assign n_17 = A[8]; assign n_18 = A[9]; assign n_19 = A[9]; assign n_20 = A[10]; assign n_21 = A[10]; assign n_22 = A[11]; assign n_23 = A[11]; assign n_24 = B[0]; assign n_25 = B[0]; assign n_26 = B[1]; assign n_27 = B[1]; assign n_28 = B[2]; assign n_29 = B[2]; assign n_30 = B[3]; assign n_31 = B[3]; assign n_32 = B[4]; assign n_33 = B[4]; assign n_34 = B[5]; assign n_35 = B[5]; assign n_36 = B[6]; assign n_37 = B[6]; assign n_38 = B[7]; assign n_39 = B[7]; assign n_40 = B[8]; assign n_41 = B[8]; assign n_42 = B[9]; assign n_43 = B[9]; assign n_44 = B[10]; assign n_45 = B[10]; assign n_46 = B[11]; assign n_47 = B[11]; assign n_48 = ~(n_2 | n_28 | n_6); assign n_54 = n_6 & n_48; assign n_55 = n_54; assign n_104 = ~n_54; assign n_105 = n_104; assign n_120 = ~n_105; assign n_121 = n_120; assign n_286 = ~n_55; assign n_287 = n_286; assign n_730 = ~(n_22 & n_40); assign n_794 = n_18 & n_42; assign n_795 = n_794; assign n_800 = n_20 & n_42; assign n_808 = n_22 & n_42; assign n_878 = n_20 & n_44; assign n_884 = n_22 & n_44; assign n_948 = n_18 & n_46; assign n_954 = n_20 & n_46; assign n_960 = n_22 & n_46; assign n_1114 = ~n_287; FAX1 tmp79(.YS(n_1274), .YC(n_1275), .A(n_800), .B(n_44), .C(n_46)); FAX1 tmp80(.YS(n_1280), .YC(n_1281), .A(n_808), .B(n_878), .C(n_948)); assign n_1286 = n_884 & n_954; HAX1 tmp82(.YS(n_1294), .YC(n_1295), .A(n_884), .B(n_954)); assign n_1460 = n_121; assign n_1461 = n_1460; assign n_1478 = n_730; MUX2X1 tmp86(.Y(n_1650), .A(n_1461), .B(n_1274), .S(n_795)); assign n_1651 = n_1650; FAX1 tmp88(.YS(n_1658), .YC(n_1659), .A(n_55), .B(n_1280), .C(n_1275)); assign n_1664 = n_1294 & n_1281; HAX1 tmp90(.YS(n_1670), .YC(n_1671), .A(n_1294), .B(n_1281)); assign n_1676 = n_105 & n_1286; assign n_1677 = n_1676; HAX1 tmp93(.YS(n_1682), .YC(n_1683), .A(n_960), .B(n_1677)); assign n_1792 = ~n_1478; FAX1 tmp95(.YS(n_1900), .YC(n_1901), .A(n_1658), .B(n_1792), .C(n_1651)); assign n_1906 = n_1670 & n_1659; HAX1 tmp97(.YS(n_1912), .YC(n_1913), .A(n_1670), .B(n_1659)); assign n_1920 = n_1682 & n_1664; HAX1 tmp99(.YS(n_1926), .YC(n_1927), .A(n_1682), .B(n_1664)); assign n_2008 = ~n_105; assign n_2022 = n_1900; HAX1 tmp102(.YS(n_2028), .YC(n_2029), .A(n_1912), .B(n_1901)); FAX1 tmp103(.YS(n_2034), .YC(n_2035), .A(n_1926), .B(n_1906), .C(n_2029)); FAX1 tmp104(.YS(n_2040), .YC(n_2041), .A(n_1676), .B(n_1920), .C(n_2035)); assign O[0] = n_34; assign O[1] = n_12; assign O[2] = n_38; assign O[3] = n_32; assign O[4] = n_42; assign O[5] = n_36; assign O[6] = n_46; assign O[7] = n_1460; assign O[8] = n_18; assign O[9] = n_54; assign O[10] = n_22; assign O[11] = n_120; assign O[12] = n_42; assign O[13] = n_1114; assign O[14] = n_14; assign O[15] = n_24; assign O[16] = n_34; assign O[17] = n_12; assign O[18] = n_2008; assign O[19] = n_16; assign O[20] = n_2022; assign O[21] = n_2028; assign O[22] = n_2034; assign O[23] = n_2040; endmodule