// Library = EvoApprox 12x12 // Circuit = mul12x12_242 // Area (45) = 114 // Delay (45) = 0.510 // Power (45) = 0.04 // MAE = 408200.50000 // MSE = 266474660377.60001 // MRE = 168.72 % // WCE = 1673222 // WCRE = 29497700 % // EP = 100.0 % module mul12x12_242(A, B, O); input [11:0] A, B; output [23:0] O; wire n_1750, n_44, n_47, n_46, n_41, n_40, n_1756, n_42, n_1594, n_1819; wire n_1818, n_1446, n_30, n_31, n_32, n_33, n_34, n_35, n_36, n_37; wire n_38, n_39, n_1742, n_45, n_1290, n_1438, n_1757, n_23, n_22, n_21; wire n_20, n_27, n_26, n_25, n_24, n_29, n_28, n_1736, n_1972, n_1973; wire n_2020, n_2026, n_18, n_19, n_16, n_17, n_14, n_15, n_1967, n_1966; wire n_10, n_11, n_81, n_80, n_12, n_13, n_1521, n_1520, n_1668, n_1669; wire n_2034, n_2040, n_43, n_1981, n_1980, n_1824, n_1825, n_1170, n_1171, n_1677; wire n_1676, n_63, n_62, n_1831, n_1830, n_8, n_9, n_4, n_5, n_6; wire n_7, n_0, n_1, n_2, n_3, n_1602, n_58, n_59, n_1588, n_50; wire n_51; assign n_0 = A[0]; assign n_1 = A[0]; assign n_2 = A[1]; assign n_3 = A[1]; assign n_4 = A[2]; assign n_5 = A[2]; assign n_6 = A[3]; assign n_7 = A[3]; assign n_8 = A[4]; assign n_9 = A[4]; assign n_10 = A[5]; assign n_11 = A[5]; assign n_12 = A[6]; assign n_13 = A[6]; assign n_14 = A[7]; assign n_15 = A[7]; assign n_16 = A[8]; assign n_17 = A[8]; assign n_18 = A[9]; assign n_19 = A[9]; assign n_20 = A[10]; assign n_21 = A[10]; assign n_22 = A[11]; assign n_23 = A[11]; assign n_24 = B[0]; assign n_25 = B[0]; assign n_26 = B[1]; assign n_27 = B[1]; assign n_28 = B[2]; assign n_29 = B[2]; assign n_30 = B[3]; assign n_31 = B[3]; assign n_32 = B[4]; assign n_33 = B[4]; assign n_34 = B[5]; assign n_35 = B[5]; assign n_36 = B[6]; assign n_37 = B[6]; assign n_38 = B[7]; assign n_39 = B[7]; assign n_40 = B[8]; assign n_41 = B[8]; assign n_42 = B[9]; assign n_43 = B[9]; assign n_44 = B[10]; assign n_45 = B[10]; assign n_46 = B[11]; assign n_47 = B[11]; assign n_50 = ~(n_26 & n_18 & n_44); assign n_51 = n_50; assign n_58 = ~(n_51 | n_44); assign n_59 = n_58; assign n_62 = ~n_59; assign n_63 = n_62; assign n_80 = ~n_62; assign n_81 = n_80; assign n_1170 = ~n_59; assign n_1171 = n_1170; assign n_1290 = n_22 & n_40; assign n_1438 = n_20 & n_42; assign n_1446 = n_22 & n_42; FAX1 tmp72(.YS(n_1520), .YC(n_1521), .A(n_1290), .B(n_1438), .C(n_22)); assign n_1588 = n_18 & n_44; assign n_1594 = n_20 & n_44; assign n_1602 = n_22 & n_44; HAX1 tmp76(.YS(n_1668), .YC(n_1669), .A(n_1520), .B(n_1588)); FAX1 tmp77(.YS(n_1676), .YC(n_1677), .A(n_1446), .B(n_1594), .C(n_1521)); assign n_1736 = n_16 & n_46; assign n_1742 = n_18 & n_46; assign n_1750 = n_20 & n_46; assign n_1756 = n_22 & n_46; assign n_1757 = n_1756; assign n_1818 = n_1668 | n_1736; assign n_1819 = n_1818; FAX1 tmp85(.YS(n_1824), .YC(n_1825), .A(n_1676), .B(n_1742), .C(n_1669)); FAX1 tmp86(.YS(n_1830), .YC(n_1831), .A(n_1602), .B(n_1750), .C(n_1677)); HAX1 tmp87(.YS(n_1966), .YC(n_1967), .A(n_1824), .B(n_1819)); FAX1 tmp88(.YS(n_1972), .YC(n_1973), .A(n_1830), .B(n_1825), .C(n_1967)); FAX1 tmp89(.YS(n_1980), .YC(n_1981), .A(n_1757), .B(n_1831), .C(n_1973)); assign n_2020 = n_1966; assign n_2026 = n_1972; assign n_2034 = n_1980; assign n_2040 = n_1981; assign O[0] = n_81; assign O[1] = n_62; assign O[2] = n_38; assign O[3] = n_32; assign O[4] = n_42; assign O[5] = n_4; assign O[6] = n_63; assign O[7] = n_40; assign O[8] = n_2; assign O[9] = n_44; assign O[10] = n_6; assign O[11] = n_32; assign O[12] = n_26; assign O[13] = n_58; assign O[14] = n_14; assign O[15] = n_24; assign O[16] = n_18; assign O[17] = n_12; assign O[18] = n_1171; assign O[19] = n_80; assign O[20] = n_2020; assign O[21] = n_2026; assign O[22] = n_2034; assign O[23] = n_2040; endmodule