// Library = EvoApprox 12x12 // Circuit = mul12x12_247 // Area (45) = 62 // Delay (45) = 0.420 // Power (45) = 0.02 // MAE = 566178.40000 // MSE = 481558327353.59998 // MRE = 269.37 % // WCE = 2248358 // WCRE = 52674300 % // EP = 100.0 % module mul12x12_247(A, B, O); input [11:0] A, B; output [23:0] O; wire n_45, n_44, n_47, n_46, n_41, n_40, n_43, n_42, n_145, n_144; wire n_778, n_1872, n_710, n_711, n_30, n_31, n_32, n_33, n_34, n_35; wire n_36, n_37, n_38, n_39, n_392, n_390, n_391, n_394, n_662, n_1864; wire n_1865, n_664, n_665, n_668, n_669, n_23, n_22, n_21, n_20, n_27; wire n_26, n_25, n_24, n_802, n_803, n_29, n_28, n_2038, n_804, n_1836; wire n_659, n_658, n_18, n_19, n_16, n_17, n_14, n_15, n_12, n_13; wire n_10, n_11, n_96, n_97, n_521, n_520, n_336, n_589, n_588, n_89; wire n_88, n_103, n_102, n_590, n_362, n_365, n_364, n_1857, n_1856, n_2044; wire n_2040, n_2042, n_70, n_800, n_161, n_160, n_801, n_518, n_519, n_756; wire n_757, n_754, n_758, n_516, n_517, n_8, n_9, n_4, n_5, n_6; wire n_7, n_0, n_1, n_2, n_3, n_761, n_760; assign n_0 = A[0]; assign n_1 = A[0]; assign n_2 = A[1]; assign n_3 = A[1]; assign n_4 = A[2]; assign n_5 = A[2]; assign n_6 = A[3]; assign n_7 = A[3]; assign n_8 = A[4]; assign n_9 = A[4]; assign n_10 = A[5]; assign n_11 = A[5]; assign n_12 = A[6]; assign n_13 = A[6]; assign n_14 = A[7]; assign n_15 = A[7]; assign n_16 = A[8]; assign n_17 = A[8]; assign n_18 = A[9]; assign n_19 = A[9]; assign n_20 = A[10]; assign n_21 = A[10]; assign n_22 = A[11]; assign n_23 = A[11]; assign n_24 = B[0]; assign n_25 = B[0]; assign n_26 = B[1]; assign n_27 = B[1]; assign n_28 = B[2]; assign n_29 = B[2]; assign n_30 = B[3]; assign n_31 = B[3]; assign n_32 = B[4]; assign n_33 = B[4]; assign n_34 = B[5]; assign n_35 = B[5]; assign n_36 = B[6]; assign n_37 = B[6]; assign n_38 = B[7]; assign n_39 = B[7]; assign n_40 = B[8]; assign n_41 = B[8]; assign n_42 = B[9]; assign n_43 = B[9]; assign n_44 = B[10]; assign n_45 = B[10]; assign n_46 = B[11]; assign n_47 = B[11]; assign n_70 = ~(n_18 | n_40 | n_10); assign n_88 = n_18 & n_70; assign n_89 = n_88; assign n_96 = ~n_89; assign n_97 = n_96; assign n_102 = ~n_97; assign n_103 = n_102; assign n_144 = ~n_89; assign n_145 = n_144; assign n_160 = ~n_97; assign n_161 = n_160; assign n_336 = n_22 & n_42; assign n_362 = n_20 & n_44; assign n_364 = n_22 & n_44; assign n_365 = n_364; assign n_390 = n_18 & n_46; assign n_391 = n_390; assign n_392 = n_20 & n_46; assign n_394 = n_22 & n_46; FAX1 tmp78(.YS(n_516), .YC(n_517), .A(n_336), .B(n_362), .C(n_391)); assign n_518 = n_365 & n_392; assign n_519 = n_518; HAX1 tmp81(.YS(n_520), .YC(n_521), .A(n_364), .B(n_392)); assign n_588 = ~n_161; assign n_589 = n_588; assign n_590 = n_517; FAX1 tmp85(.YS(n_658), .YC(n_659), .A(n_588), .B(n_516), .C(n_519)); assign n_662 = n_520 & n_517; HAX1 tmp87(.YS(n_664), .YC(n_665), .A(n_520), .B(n_517)); HAX1 tmp88(.YS(n_668), .YC(n_669), .A(n_394), .B(n_518)); assign n_710 = n_590 & n_658; assign n_711 = n_710; assign n_754 = n_664 & n_659; HAX1 tmp92(.YS(n_756), .YC(n_757), .A(n_664), .B(n_659)); assign n_758 = n_668 & n_662; HAX1 tmp94(.YS(n_760), .YC(n_761), .A(n_668), .B(n_662)); assign n_778 = ~n_145; assign n_800 = n_756; assign n_801 = n_800; HAX1 tmp98(.YS(n_802), .YC(n_803), .A(n_760), .B(n_754)); assign n_804 = n_521; assign n_1836 = n_803; assign n_1856 = n_1836 | n_758; assign n_1857 = n_1856; assign n_1864 = n_1857; assign n_1865 = n_1864; assign n_1872 = n_1865; assign n_2038 = n_711; assign n_2040 = n_801; assign n_2042 = n_802; assign n_2044 = n_804 | n_1872; assign O[0] = n_18; assign O[1] = n_102; assign O[2] = n_6; assign O[3] = n_0; assign O[4] = n_589; assign O[5] = n_20; assign O[6] = n_14; assign O[7] = n_588; assign O[8] = n_145; assign O[9] = n_102; assign O[10] = n_38; assign O[11] = n_96; assign O[12] = n_26; assign O[13] = n_778; assign O[14] = n_103; assign O[15] = n_8; assign O[16] = n_34; assign O[17] = n_102; assign O[18] = n_38; assign O[19] = n_144; assign O[20] = n_2038; assign O[21] = n_2040; assign O[22] = n_2042; assign O[23] = n_2044; endmodule