// Library = EvoApprox 12x12 // Circuit = mul12x12_250 // Area (45) = 59 // Delay (45) = 0.400 // Power (45) = 0.02 // MAE = 812021.50000 // MSE = 937203589461.50000 // MRE = 732.41 % // WCE = 2378539 // WCRE = 157286500 % // EP = 100.0 % module mul12x12_250(A, B, O); input [11:0] A, B; output [23:0] O; wire n_274, n_1313, n_1420, n_1309, n_23, n_22, n_21, n_20, n_41, n_26; wire n_25, n_1311, n_1152, n_1182, n_1490, n_1287, n_1285, n_1283, n_68, n_910; wire n_1289, n_996, n_1504, n_1506, n_1516, n_1520, n_1402, n_8, n_9, n_1051; wire n_261, n_4, n_5, n_6, n_7, n_0, n_1, n_2, n_3, n_1406; wire n_18, n_19, n_16, n_17, n_14, n_15, n_12, n_13, n_10, n_11; wire n_97, n_1522, n_1049, n_1281, n_1158, n_1512, n_1416, n_1510, n_1414, n_1404; wire n_1412, n_1514, n_1410, n_1518, n_1418, n_1180, n_920; assign n_0 = A[0]; assign n_1 = A[1]; assign n_2 = A[2]; assign n_3 = A[3]; assign n_4 = A[4]; assign n_5 = A[5]; assign n_6 = A[6]; assign n_7 = A[7]; assign n_8 = A[8]; assign n_9 = A[9]; assign n_10 = A[10]; assign n_11 = A[11]; assign n_12 = B[0]; assign n_13 = B[1]; assign n_14 = B[2]; assign n_15 = B[3]; assign n_16 = B[4]; assign n_17 = B[5]; assign n_18 = B[6]; assign n_19 = B[7]; assign n_20 = B[8]; assign n_21 = B[9]; assign n_22 = B[10]; assign n_23 = B[11]; assign n_25 = ~(n_17 ^ n_17); assign n_26 = ~n_25; assign n_41 = n_26 & n_6; assign n_68 = n_22; assign n_97 = ~(n_22 | n_25); assign n_261 = ~(n_41 | n_26); assign n_274 = ~n_97; assign n_910 = ~n_261; assign n_920 = n_11 & n_20; assign n_996 = n_97; assign n_1049 = n_10 & n_21; assign n_1051 = n_11 & n_21; assign n_1152 = n_920 & n_1049; assign n_1158 = n_1152 | n_996; assign n_1180 = n_10 & n_22; assign n_1182 = n_11 & n_22; assign n_1281 = n_1051 ^ n_97; assign n_1283 = n_1051 & n_1180; assign n_1285 = n_274 & n_1158; assign n_1287 = n_1281; assign n_1289 = n_1283 | n_1285; assign n_1309 = n_9 & n_23; assign n_1311 = n_10 & n_23; assign n_1313 = n_11 & n_23; assign n_1402 = n_41 ^ n_1309; assign n_1404 = n_1287 & n_1402; assign n_1406 = n_1402 & n_68; assign n_1410 = n_1404 | n_1406; assign n_1412 = n_1182 ^ n_1311; assign n_1414 = n_1182 & n_1311; assign n_1416 = n_1412 & n_1289; assign n_1418 = n_1412 ^ n_1289; assign n_1420 = n_1414 | n_1416; assign n_1490 = ~n_41; assign n_1504 = n_1418 ^ n_1410; assign n_1506 = n_1418 & n_1410; assign n_1510 = n_1504 ^ n_910; assign n_1512 = n_1506; assign n_1514 = n_1313 ^ n_1420; assign n_1516 = n_1313 & n_1420; assign n_1518 = n_1514 & n_1512; assign n_1520 = n_1514 ^ n_1506; assign n_1522 = n_1516 | n_1518; assign O[0] = n_17; assign O[1] = n_1490; assign O[2] = n_23; assign O[3] = n_16; assign O[4] = n_5; assign O[5] = n_22; assign O[6] = n_19; assign O[7] = n_8; assign O[8] = n_41; assign O[9] = n_6; assign O[10] = n_3; assign O[11] = n_20; assign O[12] = n_9; assign O[13] = n_10; assign O[14] = n_15; assign O[15] = n_20; assign O[16] = n_17; assign O[17] = n_6; assign O[18] = n_11; assign O[19] = n_1490; assign O[20] = n_261; assign O[21] = n_1510; assign O[22] = n_1520; assign O[23] = n_1522; endmodule