// Library = EvoApprox 12x12
// Circuit = mul12x12_254
// Area   (45) = 43
// Delay  (45) = 0.300
// Power  (45) = 0.01
// MAE = 934525.80000
// MSE = 1191442713821.69995
// MRE = 555.63 %
// WCE = 2886024
// WCRE = 105075900 %
// EP = 100.0 %
module mul12x12_254(A, B, O);
  input [11:0] A, B;
  output [23:0] O;
  wire n_2032, n_36, n_42, n_37, n_57, n_23, n_22, n_21, n_20, n_27;
  wire n_26, n_25, n_24, n_29, n_28, n_49, n_48, n_1778, n_1938, n_1939;
  wire n_1389, n_1388, n_65, n_64, n_576, n_1946, n_1604, n_39, n_577, n_38;
  wire n_1605, n_8, n_9, n_4, n_5, n_6, n_7, n_0, n_1, n_2;
  wire n_3, n_30, n_31, n_32, n_33, n_34, n_35, n_18, n_19, n_16;
  wire n_17, n_14, n_15, n_12, n_13, n_10, n_11, n_45, n_2041, n_2040;
  wire n_44, n_43, n_56, n_47, n_1866, n_1867, n_46, n_1952, n_41, n_2033;
  wire n_40;
  assign n_0 = A[0];
  assign n_1 = A[0];
  assign n_2 = A[1];
  assign n_3 = A[1];
  assign n_4 = A[2];
  assign n_5 = A[2];
  assign n_6 = A[3];
  assign n_7 = A[3];
  assign n_8 = A[4];
  assign n_9 = A[4];
  assign n_10 = A[5];
  assign n_11 = A[5];
  assign n_12 = A[6];
  assign n_13 = A[6];
  assign n_14 = A[7];
  assign n_15 = A[7];
  assign n_16 = A[8];
  assign n_17 = A[8];
  assign n_18 = A[9];
  assign n_19 = A[9];
  assign n_20 = A[10];
  assign n_21 = A[10];
  assign n_22 = A[11];
  assign n_23 = A[11];
  assign n_24 = B[0];
  assign n_25 = B[0];
  assign n_26 = B[1];
  assign n_27 = B[1];
  assign n_28 = B[2];
  assign n_29 = B[2];
  assign n_30 = B[3];
  assign n_31 = B[3];
  assign n_32 = B[4];
  assign n_33 = B[4];
  assign n_34 = B[5];
  assign n_35 = B[5];
  assign n_36 = B[6];
  assign n_37 = B[6];
  assign n_38 = B[7];
  assign n_39 = B[7];
  assign n_40 = B[8];
  assign n_41 = B[8];
  assign n_42 = B[9];
  assign n_43 = B[9];
  assign n_44 = B[10];
  assign n_45 = B[10];
  assign n_46 = B[11];
  assign n_47 = B[11];
  assign n_48 = ~(n_34 & n_44 & n_6);
  assign n_49 = n_48;
  assign n_56 = ~(n_49 | n_44);
  assign n_57 = n_56;
  assign n_64 = ~n_57;
  assign n_65 = n_64;
  assign n_576 = ~n_65;
  assign n_577 = n_576;
  assign n_1388 = ~n_57;
  assign n_1389 = n_1388;
  assign n_1604 = n_22 & n_42;
  assign n_1605 = n_1604;
  assign n_1778 = n_22 & n_44;
  FAX1 tmp72(.YS(n_1866), .YC(n_1867), .A(n_577), .B(n_1778), .C(n_1605));
  assign n_1938 = n_18 & n_46;
  assign n_1939 = n_1938;
  assign n_1946 = n_20 & n_46;
  assign n_1952 = n_22 & n_46;
  FAX1 tmp77(.YS(n_2032), .YC(n_2033), .A(n_1866), .B(n_1946), .C(n_1939));
  FAX1 tmp78(.YS(n_2040), .YC(n_2041), .A(n_1867), .B(n_1952), .C(n_2033));
  assign O[0] = n_57;
  assign O[1] = n_28;
  assign O[2] = n_6;
  assign O[3] = n_64;
  assign O[4] = n_10;
  assign O[5] = n_20;
  assign O[6] = n_14;
  assign O[7] = n_1388;
  assign O[8] = n_18;
  assign O[9] = n_28;
  assign O[10] = n_6;
  assign O[11] = n_64;
  assign O[12] = n_26;
  assign O[13] = n_36;
  assign O[14] = n_30;
  assign O[15] = n_8;
  assign O[16] = n_577;
  assign O[17] = n_12;
  assign O[18] = n_38;
  assign O[19] = n_16;
  assign O[20] = n_1389;
  assign O[21] = n_2032;
  assign O[22] = n_2040;
  assign O[23] = n_2041;
endmodule