// Library = EvoApprox 12x12
// Circuit = mul12x12_257
// Area   (45) = 48
// Delay  (45) = 0.330
// Power  (45) = 0.01
// MAE = 985290.60000
// MSE = 1458640287312.89990
// MRE = 228.32 %
// WCE = 3235625
// WCRE = 3289550 %
// EP = 100.0 %
module mul12x12_257(A, B, O);
  input [11:0] A, B;
  output [23:0] O;
  wire n_1926, n_36, n_42, n_1295, n_2029, n_37, n_57, n_23, n_22, n_21;
  wire n_20, n_27, n_26, n_25, n_24, n_1670, n_954, n_29, n_28, n_1493;
  wire n_1492, n_552, n_81, n_80, n_2028, n_1280, n_1281, n_2034, n_2040, n_1912;
  wire n_1682, n_1683, n_1676, n_974, n_39, n_553, n_38, n_975, n_1286, n_8;
  wire n_9, n_1294, n_4, n_5, n_6, n_7, n_0, n_1, n_2, n_3;
  wire n_30, n_31, n_32, n_33, n_34, n_35, n_18, n_19, n_16, n_17;
  wire n_14, n_15, n_12, n_13, n_10, n_11, n_960, n_45, n_2035, n_2041;
  wire n_948, n_44, n_1664, n_43, n_2002, n_56, n_47, n_46, n_884, n_41;
  wire n_2003, n_40;
  assign n_0 = A[0];
  assign n_1 = A[0];
  assign n_2 = A[1];
  assign n_3 = A[1];
  assign n_4 = A[2];
  assign n_5 = A[2];
  assign n_6 = A[3];
  assign n_7 = A[3];
  assign n_8 = A[4];
  assign n_9 = A[4];
  assign n_10 = A[5];
  assign n_11 = A[5];
  assign n_12 = A[6];
  assign n_13 = A[6];
  assign n_14 = A[7];
  assign n_15 = A[7];
  assign n_16 = A[8];
  assign n_17 = A[8];
  assign n_18 = A[9];
  assign n_19 = A[9];
  assign n_20 = A[10];
  assign n_21 = A[10];
  assign n_22 = A[11];
  assign n_23 = A[11];
  assign n_24 = B[0];
  assign n_25 = B[0];
  assign n_26 = B[1];
  assign n_27 = B[1];
  assign n_28 = B[2];
  assign n_29 = B[2];
  assign n_30 = B[3];
  assign n_31 = B[3];
  assign n_32 = B[4];
  assign n_33 = B[4];
  assign n_34 = B[5];
  assign n_35 = B[5];
  assign n_36 = B[6];
  assign n_37 = B[6];
  assign n_38 = B[7];
  assign n_39 = B[7];
  assign n_40 = B[8];
  assign n_41 = B[8];
  assign n_42 = B[9];
  assign n_43 = B[9];
  assign n_44 = B[10];
  assign n_45 = B[10];
  assign n_46 = B[11];
  assign n_47 = B[11];
  assign n_56 = n_44 ^ n_44;
  assign n_57 = n_56;
  assign n_80 = ~n_57;
  assign n_81 = n_80;
  assign n_552 = ~n_57;
  assign n_553 = n_552;
  assign n_884 = n_22 & n_44;
  assign n_948 = n_18 & n_46;
  assign n_954 = n_20 & n_46;
  assign n_960 = n_22 & n_46;
  assign n_974 = n_57;
  assign n_975 = n_974;
  MUX2X1 tmp71(.Y(n_1280), .A(n_57), .B(n_44), .S(n_948));
  assign n_1281 = n_1280;
  assign n_1286 = n_884 & n_954;
  HAX1 tmp74(.YS(n_1294), .YC(n_1295), .A(n_884), .B(n_954));
  assign n_1492 = ~n_81;
  assign n_1493 = n_1492;
  assign n_1664 = n_1294 & n_1281;
  assign n_1670 = n_1294 | n_1280;
  assign n_1676 = n_553 & n_1286;
  HAX1 tmp80(.YS(n_1682), .YC(n_1683), .A(n_960), .B(n_1286));
  assign n_1912 = n_1670;
  assign n_1926 = n_1682 | n_1664;
  assign n_2002 = ~n_81;
  assign n_2003 = n_2002;
  FAX1 tmp85(.YS(n_2028), .YC(n_2029), .A(n_1912), .B(n_2002), .C(n_22));
  FAX1 tmp86(.YS(n_2034), .YC(n_2035), .A(n_1926), .B(n_974), .C(n_2029));
  FAX1 tmp87(.YS(n_2040), .YC(n_2041), .A(n_1676), .B(n_974), .C(n_2035));
  assign O[0] = n_2041;
  assign O[1] = n_28;
  assign O[2] = n_22;
  assign O[3] = n_0;
  assign O[4] = n_1493;
  assign O[5] = n_36;
  assign O[6] = n_30;
  assign O[7] = n_8;
  assign O[8] = n_57;
  assign O[9] = n_974;
  assign O[10] = n_2003;
  assign O[11] = n_32;
  assign O[12] = n_26;
  assign O[13] = n_20;
  assign O[14] = n_975;
  assign O[15] = n_1492;
  assign O[16] = n_18;
  assign O[17] = n_12;
  assign O[18] = n_22;
  assign O[19] = n_32;
  assign O[20] = n_42;
  assign O[21] = n_2028;
  assign O[22] = n_2034;
  assign O[23] = n_2040;
endmodule