// Library = EvoApprox 12x12
// Circuit = mul12x12_266
// Area   (45) = 61
// Delay  (45) = 0.420
// Power  (45) = 0.02
// MAE = 881867.70000
// MSE = 1141309909593.89990
// MRE = 505.12 %
// WCE = 3308659
// WCRE = 108339100 %
// EP = 100.0 %
module mul12x12_266(A, B, O);
  input [11:0] A, B;
  output [23:0] O;
  wire n_45, n_44, n_47, n_46, n_41, n_40, n_43, n_42, n_864, n_49;
  wire n_48, n_386, n_30, n_31, n_32, n_33, n_34, n_35, n_36, n_37;
  wire n_38, n_39, n_392, n_394, n_662, n_664, n_665, n_668, n_669, n_23;
  wire n_22, n_21, n_20, n_27, n_26, n_25, n_24, n_802, n_29, n_28;
  wire n_804, n_659, n_658, n_18, n_19, n_16, n_17, n_14, n_15, n_12;
  wire n_13, n_10, n_11, n_521, n_520, n_336, n_337, n_81, n_80, n_364;
  wire n_78, n_2040, n_2042, n_74, n_75, n_800, n_801, n_518, n_756, n_754;
  wire n_758, n_514, n_515, n_516, n_517, n_8, n_9, n_4, n_5, n_6;
  wire n_7, n_0, n_1, n_2, n_3, n_52, n_53, n_54, n_55, n_761;
  wire n_760;
  assign n_0 = A[0];
  assign n_1 = A[0];
  assign n_2 = A[1];
  assign n_3 = A[1];
  assign n_4 = A[2];
  assign n_5 = A[2];
  assign n_6 = A[3];
  assign n_7 = A[3];
  assign n_8 = A[4];
  assign n_9 = A[4];
  assign n_10 = A[5];
  assign n_11 = A[5];
  assign n_12 = A[6];
  assign n_13 = A[6];
  assign n_14 = A[7];
  assign n_15 = A[7];
  assign n_16 = A[8];
  assign n_17 = A[8];
  assign n_18 = A[9];
  assign n_19 = A[9];
  assign n_20 = A[10];
  assign n_21 = A[10];
  assign n_22 = A[11];
  assign n_23 = A[11];
  assign n_24 = B[0];
  assign n_25 = B[0];
  assign n_26 = B[1];
  assign n_27 = B[1];
  assign n_28 = B[2];
  assign n_29 = B[2];
  assign n_30 = B[3];
  assign n_31 = B[3];
  assign n_32 = B[4];
  assign n_33 = B[4];
  assign n_34 = B[5];
  assign n_35 = B[5];
  assign n_36 = B[6];
  assign n_37 = B[6];
  assign n_38 = B[7];
  assign n_39 = B[7];
  assign n_40 = B[8];
  assign n_41 = B[8];
  assign n_42 = B[9];
  assign n_43 = B[9];
  assign n_44 = B[10];
  assign n_45 = B[10];
  assign n_46 = B[11];
  assign n_47 = B[11];
  assign n_48 = ~(n_34 & n_28 & n_16);
  assign n_49 = n_48;
  assign n_52 = n_49 | n_28;
  assign n_53 = n_52;
  assign n_54 = ~n_53;
  assign n_55 = n_54;
  assign n_74 = ~n_53;
  assign n_75 = n_74;
  assign n_78 = ~n_53;
  assign n_80 = ~n_78;
  assign n_81 = n_80;
  assign n_336 = n_22 & n_42;
  assign n_337 = n_336;
  assign n_364 = n_22 & n_44;
  assign n_386 = n_18 & n_46;
  assign n_392 = n_20 & n_46;
  assign n_394 = n_22 & n_46;
  MUX2X1 tmp76(.Y(n_514), .A(n_55), .B(n_20), .S(n_386));
  assign n_515 = n_514;
  assign n_516 = n_337;
  assign n_517 = n_516;
  assign n_518 = n_364 & n_392;
  HAX1 tmp81(.YS(n_520), .YC(n_521), .A(n_364), .B(n_392));
  MUX2X1 tmp82(.Y(n_658), .A(n_75), .B(n_44), .S(n_515));
  assign n_659 = n_658;
  assign n_662 = n_520 & n_336;
  HAX1 tmp85(.YS(n_664), .YC(n_665), .A(n_520), .B(n_517));
  HAX1 tmp86(.YS(n_668), .YC(n_669), .A(n_394), .B(n_518));
  assign n_754 = n_664 & n_658;
  assign n_756 = n_664 | n_659;
  assign n_758 = n_46 & n_662;
  HAX1 tmp90(.YS(n_760), .YC(n_761), .A(n_668), .B(n_662));
  assign n_800 = n_756;
  assign n_801 = n_800;
  assign n_802 = n_760 | n_754;
  assign n_804 = n_521 | n_758;
  assign n_864 = ~n_81;
  assign n_2040 = n_801;
  assign n_2042 = n_802;
  assign O[0] = n_2;
  assign O[1] = n_28;
  assign O[2] = n_38;
  assign O[3] = n_32;
  assign O[4] = n_42;
  assign O[5] = n_74;
  assign O[6] = n_55;
  assign O[7] = n_40;
  assign O[8] = n_2;
  assign O[9] = n_54;
  assign O[10] = n_22;
  assign O[11] = n_0;
  assign O[12] = n_26;
  assign O[13] = n_20;
  assign O[14] = n_30;
  assign O[15] = n_24;
  assign O[16] = n_18;
  assign O[17] = n_78;
  assign O[18] = n_38;
  assign O[19] = n_864;
  assign O[20] = n_53;
  assign O[21] = n_2040;
  assign O[22] = n_2042;
  assign O[23] = n_804;
endmodule