// Library = EvoApprox 12x12 // Circuit = mul12x12_271 // Area (45) = 38 // Delay (45) = 0.230 // Power (45) = 0.01 // MAE = 958155.10000 // MSE = 1408803700424.00000 // MRE = 511.43 % // WCE = 3350567 // WCRE = 112439000 % // EP = 100.0 % module mul12x12_271(A, B, O); input [11:0] A, B; output [23:0] O; wire n_1307, n_1303, n_1486, n_1493, n_1520, n_1094, n_190, n_1311, n_23, n_22; wire n_21, n_20, n_27, n_25, n_24, n_49, n_1312, n_1491, n_383, n_1215; wire n_1211, n_65, n_1487, n_200, n_1500, n_1213, n_39, n_1522, n_539, n_738; wire n_1514, n_1498, n_182, n_8, n_9, n_4, n_5, n_6, n_7, n_0; wire n_1, n_2, n_3, n_1480, n_1482, n_1484, n_18, n_19, n_16, n_17; wire n_14, n_15, n_12, n_13, n_10, n_11, n_1469, n_299, n_1314, n_1298; wire n_157, n_1513, n_1473, n_1475, n_1477, n_135; assign n_0 = A[0]; assign n_1 = A[1]; assign n_2 = A[2]; assign n_3 = A[3]; assign n_4 = A[4]; assign n_5 = A[5]; assign n_6 = A[6]; assign n_7 = A[7]; assign n_8 = A[8]; assign n_9 = A[9]; assign n_10 = A[10]; assign n_11 = A[11]; assign n_12 = B[0]; assign n_13 = B[1]; assign n_14 = B[2]; assign n_15 = B[3]; assign n_16 = B[4]; assign n_17 = B[5]; assign n_18 = B[6]; assign n_19 = B[7]; assign n_20 = B[8]; assign n_21 = B[9]; assign n_22 = B[10]; assign n_23 = B[11]; assign n_24 = ~(n_6 ^ n_6); assign n_25 = ~(n_24 | n_2); assign n_27 = n_25; assign n_39 = ~n_25; assign n_49 = ~(n_27 | n_27); assign n_65 = ~(n_11 | n_49); assign n_135 = ~n_27; assign n_157 = ~(n_6 | n_49); assign n_182 = ~n_25; assign n_190 = ~(n_23 & n_10); assign n_200 = n_65; assign n_299 = ~n_182; assign n_383 = n_27; assign n_539 = ~n_190; assign n_738 = ~n_299; assign n_1094 = n_11 & n_22; assign n_1211 = n_9 & n_23; assign n_1213 = n_10 & n_23; assign n_1215 = n_11 & n_23; assign n_1298 = n_299 ^ n_1211; assign n_1303 = n_1298; assign n_1307 = n_1094 ^ n_1213; assign n_1311 = n_1307; assign n_1312 = n_1307 ^ n_738; assign n_1314 = n_539 | n_1311; assign n_1469 = n_1303 ^ n_65; assign n_1473 = ~n_1469; assign n_1475 = n_383 | n_1298; assign n_1477 = n_1312 & n_539; assign n_1480 = n_1477 & n_1475; assign n_1482 = n_1477 ^ n_1475; assign n_1484 = n_157 | n_1480; assign n_1486 = n_1215 ^ n_1314; assign n_1487 = n_1215 & n_1314; assign n_1491 = n_1486 ^ n_1484; assign n_1493 = n_1487 & n_135; assign n_1498 = n_1473 & n_182; assign n_1500 = n_1477 | n_1498; assign n_1513 = n_1491 & n_738; assign n_1514 = n_299 | n_1513; assign n_1520 = n_1493 & n_182; assign n_1522 = n_157 | n_1520; assign O[0] = n_49; assign O[1] = n_738; assign O[2] = n_39; assign O[3] = n_20; assign O[4] = n_17; assign O[5] = n_182; assign O[6] = n_3; assign O[7] = n_8; assign O[8] = n_13; assign O[9] = n_18; assign O[10] = n_7; assign O[11] = n_12; assign O[12] = n_5; assign O[13] = n_182; assign O[14] = n_383; assign O[15] = n_16; assign O[16] = n_49; assign O[17] = n_22; assign O[18] = n_299; assign O[19] = n_200; assign O[20] = n_1500; assign O[21] = n_1482; assign O[22] = n_1514; assign O[23] = n_1522; endmodule