// Library = EvoApprox 16x16 // Circuit = mul16x16_052 // Area (45) = 74 // Delay (45) = 0.570 // Power (45) = 0.02 // MAE = 172540590.00000 // MRE = 799.27 % // WCE = 558181488 // WCE% = 12.996 % // EP = 100.0 % module mul16x16_052 ( A, B, Z ); input [15:0] A; input [15:0] B; output [31:0] Z; wire sig_40; wire sig_55; wire sig_206; wire sig_218; wire sig_274; wire sig_284; wire sig_383; wire sig_534; wire sig_664; wire sig_673; wire sig_718; wire sig_759; wire sig_768; wire sig_774; wire sig_875; wire sig_1225; wire sig_1233; wire sig_1236; wire sig_1288; wire sig_1328; wire sig_1351; wire sig_1557; wire sig_1561; wire sig_1562; wire sig_1563; wire sig_1564; wire sig_1565; assign sig_40 = A[15] & B[13]; assign sig_55 = A[15] & B[14]; assign sig_206 = A[13] & B[15]; assign sig_218 = A[14] & B[15]; assign sig_274 = A[14] & B[14]; assign sig_284 = A[15] & B[15]; assign sig_383 = sig_40 | sig_274; assign sig_534 = sig_274 & sig_40; assign sig_664 = B[15] & sig_534; assign sig_673 = sig_534 ^ sig_218; assign sig_718 = sig_55 ^ sig_673; assign sig_759 = sig_673 & sig_55; assign sig_768 = sig_284 ^ sig_759; assign sig_774 = sig_768 ^ sig_664; assign sig_875 = sig_284 & sig_759; assign sig_1225 = sig_383; assign sig_1233 = sig_718 ^ sig_206; assign sig_1236 = ~ sig_383; assign sig_1288 = sig_206 & sig_718; assign sig_1328 = sig_768 & sig_1288; assign sig_1351 = sig_774 ^ sig_1288; assign sig_1557 = sig_1233 ^ sig_1225; assign sig_1561 = sig_383 & sig_1233; assign sig_1562 = sig_1351 ^ sig_1561; assign sig_1563 = sig_768 & sig_1561; assign sig_1564 = sig_1328 | sig_1563; assign sig_1565 = sig_875 | sig_1564; assign Z[0] = A[0]; assign Z[1] = B[2]; assign Z[2] = A[15]; assign Z[3] = sig_284; assign Z[4] = A[0]; assign Z[5] = sig_1236; assign Z[6] = A[11]; assign Z[7] = sig_673; assign Z[8] = A[4]; assign Z[9] = A[3]; assign Z[10] = A[9]; assign Z[11] = sig_1561; assign Z[12] = B[11]; assign Z[13] = A[6]; assign Z[14] = A[8]; assign Z[15] = A[0]; assign Z[16] = sig_55; assign Z[17] = B[8]; assign Z[18] = B[3]; assign Z[19] = B[3]; assign Z[20] = B[7]; assign Z[21] = B[0]; assign Z[22] = B[3]; assign Z[23] = A[11]; assign Z[24] = sig_759; assign Z[25] = B[14]; assign Z[26] = sig_759; assign Z[27] = A[12]; assign Z[28] = sig_1236; assign Z[29] = sig_1557; assign Z[30] = sig_1562; assign Z[31] = sig_1565; endmodule