// Library = EvoApprox 16x16
// Circuit = mul16x16_054
// Area   (45) = 79
// Delay  (45) = 0.600
// Power  (45) = 0.02
// MAE = 161532244.00000
// MRE = 200.50 %
// WCE = 607298482
// WCE% = 14.140 %
// EP = 96.9 %
module mul16x16_054 (
A,
B,
Z
);

input [15:0] A;
input [15:0] B;
output [31:0] Z;

wire sig_40;
wire sig_55;
wire sig_206;
wire sig_218;
wire sig_274;
wire sig_284;
wire sig_383;
wire sig_534;
wire sig_664;
wire sig_673;
wire sig_718;
wire sig_759;
wire sig_768;
wire sig_774;
wire sig_875;
wire sig_1220;
wire sig_1233;
wire sig_1328;
wire sig_1351;
wire sig_1393;
wire sig_1557;
wire sig_1562;
wire sig_1563;
wire sig_1564;
wire sig_1565;

assign sig_40 = A[15] & B[13];
assign sig_55 = A[15] & B[14];
assign sig_206 = A[13] & B[15];
assign sig_218 = A[14] & B[15];
assign sig_274 = A[14] & B[14];
assign sig_284 = A[15] & B[15];
assign sig_383 = sig_40 | sig_274;
assign sig_534 = sig_274 & sig_40;
assign sig_664 = sig_284 & sig_534;
assign sig_673 = sig_534 ^ sig_218;
assign sig_718 = sig_55 ^ sig_673;
assign sig_759 = sig_673 & sig_55;
assign sig_768 = sig_284 ^ sig_759;
assign sig_774 = sig_768 ^ sig_664;
assign sig_875 = sig_284 & sig_274;
assign sig_1220 = sig_718 & sig_206;
assign sig_1233 = sig_718 ^ sig_206;
assign sig_1328 = sig_284 & sig_1220;
assign sig_1351 = sig_774 ^ sig_1220;
assign sig_1393 = sig_1233 & sig_383;
assign sig_1557 = sig_1233 ^ sig_383;
assign sig_1562 = sig_1351 ^ sig_1393;
assign sig_1563 = sig_774 & sig_1393;
assign sig_1564 = sig_1328 | sig_1563;
assign sig_1565 = sig_875 | sig_1564;

assign Z[0] = B[1];
assign Z[1] = sig_206;
assign Z[2] = sig_40;
assign Z[3] = sig_534;
assign Z[4] = A[1];
assign Z[5] = B[6];
assign Z[6] = sig_1562;
assign Z[7] = A[7];
assign Z[8] = B[3];
assign Z[9] = A[7];
assign Z[10] = sig_1562;
assign Z[11] = B[0];
assign Z[12] = sig_1557;
assign Z[13] = A[0];
assign Z[14] = sig_55;
assign Z[15] = sig_759;
assign Z[16] = A[4];
assign Z[17] = A[5];
assign Z[18] = B[5];
assign Z[19] = B[7];
assign Z[20] = sig_1564;
assign Z[21] = A[7];
assign Z[22] = sig_1565;
assign Z[23] = B[14];
assign Z[24] = B[14];
assign Z[25] = sig_1328;
assign Z[26] = A[10];
assign Z[27] = A[12];
assign Z[28] = B[12];
assign Z[29] = sig_1557;
assign Z[30] = sig_1562;
assign Z[31] = sig_1565;

endmodule