Automated Analysis and Verification Research Group - VeriFIT
Results
| 2018 | MINA: A Tool for Verification of Programs with an Unbounded Number of Threads, software, 2018
Authors: Holík Lukáš, Turoňová Lenka, Vojnar Tomáš |
| | Ranger: A Tool for Bounds Analysis of Heap-Manipulating Programs, software, 2018
Authors: Fiedor Tomáš, Holík Lukáš, Rogalewicz Adam, Sinn Moritz, Vojnar Tomáš, Zuleger Florian |
| | Sloth: An SMT Solver for String Constraints, software, 2018
Authors: Holík Lukáš, Janků Petr, Lin Anthony W., Rummer Philipp, Vojnar Tomáš |
| 2017 | Gaston - Symbolic WS1S Solver, software, 2017
Authors: Fiedor Tomáš, Holík Lukáš, Janků Petr, Lengál Ondřej, Vojnar Tomáš |
| 2015 | dWiNA - An Implementation of Decision Procedure for WS1S, software, 2015
Authors: Fiedor Tomáš, Lengál Ondřej, Holík Lukáš, Vojnar Tomáš |
| | INCLUDER (tracer): Trace Inclusion for Data Word Automata, software, 2015
Authors: Rogalewicz Adam, Iosif Radu, Vojnar Tomáš |
| 2014 | HADES (Hazard Detection System), software, 2014
Authors: Charvát Lukáš, Smrčka Aleš, Vojnar Tomáš |
| | SLIDE: Separation Logic with Inductive Definitions, software, 2014
Authors: Rogalewicz Adam, Iosif Radu, Vojnar Tomáš |
| | SPEN - A Solver for Separation Logic Entailments, software, 2014
Authors: Enea Constantin, Lengál Ondřej, Sighireanu Mihaela, Vojnar Tomáš |
| 2013 | CPAlien: Configurable Program Analysis over Symbolic Memory Graphs, software, 2013
Authors: Müller Petr, Vojnar Tomáš |
| 2012 | A Framework for Analysing Multi-threaded C/C++ Programs on the Binary Level, software, 2012
Authors: Fiedor Jan, Vojnar Tomáš |
| | HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware, software, 2012
Authors: Zachariášová Marcela, Lengál Ondřej, Kajan Michal |
| | VATA: A Library for Efficient Manipulation of Non-Deterministic Tree Automata, software, 2012
Authors: Lengál Ondřej, Šimáček Jiří, Vojnar Tomáš |
| 2011 | A Tool Chain Combining Dynamic Analysis and Bounded Model Checking, software, 2011
Authors: Dudka Vendula, Fiedor Jan, Křena Bohuslav, Vojnar Tomáš |
| 2010 | An Easy to Use Infrastructure for Building Static Analysis Tools, software, 2010
Authors: Dudka Kamil, Peringer Petr, Vojnar Tomáš |
| | Forester: A Tool for Verification of Programs with Pointers, software, 2010
Authors: Habermehl Peter, Holík Lukáš, Rogalewicz Adam, Šimáček Jiří, Vojnar Tomáš |
| | Framework for Formal Verification of Clock Domain Crossing, software, 2010
Authors: Smrčka Aleš, Vojnar Tomáš |
| | libSFTA: A Semi-symbolic Nondeterministic Finite Tree Automata Library Prototype, software, 2010
Authors: Holík Lukáš, Lengál Ondřej, Vojnar Tomáš |
| | Predator: A Tool for Checking Manipulation of Dynamic Data Structures Using Separation Logic, software, 2010
Authors: Dudka Kamil, Peringer Petr, Vojnar Tomáš |
| | Replay Tracer & BMC, software, 2010
Authors: Dudka Vendula, Fiedor Jan, Křena Bohuslav, Letko Zdeněk, Vojnar Tomáš |
| | Search-based Testing Environment (SearchBestie), software, 2010
Authors: Letko Zdeněk, Vojnar Tomáš, Křena Bohuslav |
| | Tool for verification of systems described using the Modechart formalism, software, 2010
Authors: Gach Marek, Fiedor Jan, Češka Milan |
| | Tool for verification of systems specified in RT-Logic language, software, 2010
Authors: Fiedor Jan, Gach Marek, Češka Milan |
| 2009 | Clock Domain Crossing Analyzer, software, 2009
Authors: Smrčka Aleš |
| | FAST to ARMC Translator, software, 2009
Authors: Smrčka Aleš |
| | FLATA, software, 2009
Authors: Konečný Filip, Vojnar Tomáš, Bozga Marius, Iosif Radu |
| | Tool for Computing Simulations, software, 2009
Authors: Holík Lukáš, Šimáček Jiří, Vojnar Tomáš |
| 2008 | Java Atomicity Violation Detector & Healer, software, 2008
Authors: Letko Zdeněk, Vojnar Tomáš, Křena Bohuslav |
| | Model checking Using Symbolic Execution, software, 2008
Authors: Křena Bohuslav, Braione Pietro, Denaro Giovanni, Pezze Mauro |
| 2007 | ARTMC - Abstract Regular Tree Model Checking, software, 2007
Authors: Rogalewicz Adam, Vojnar Tomáš |
| | Java Race Detector & Healer, software, 2007
Authors: Letko Zdeněk, Vojnar Tomáš, Křena Bohuslav |
| | Translator of VHDL Design to Counter Automaton, software, 2007
Authors: Smrčka Aleš, Vojnar Tomáš |
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Faculty of Information Technology
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