Automated Analysis and Verification Research Group - VeriFIT

Results

2012HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware, software, 2012
Authors: Šimková Marcela, Lengál Ondřej, Kajan Michal
 VATA: A Library for Efficient Manipulation of Non-Deterministic Tree Automata, software, 2012
Authors: Lengál Ondřej, Šimáček Jiří, Vojnar Tomáš
2011A Tool Chain Combining Dynamic Analysis and Bounded Model Checking, software, 2011
Authors: Fiedor Jan, Hrubá Vendula, Křena Bohuslav, Vojnar Tomáš
2010An Easy to Use Infrastructure for Building Static Analysis Tools, software, 2010
Authors: Dudka Kamil, Peringer Petr, Vojnar Tomáš
 Forester: A Tool for Verification of Programs with Pointers, software, 2010
Authors: Habermehl Peter, Holík Lukáš, Rogalewicz Adam, Šimáček Jiří, Vojnar Tomáš
 Framework for Formal Verification of Clock Domain Crossing, software, 2010
Authors: Smrčka Aleš, Vojnar Tomáš
 libSFTA: A Semi-symbolic Nondeterministic Finite Tree Automata Library Prototype, software, 2010
Authors: Holík Lukáš, Lengál Ondřej, Vojnar Tomáš
 Predator: A Tool for Checking Manipulation of Dynamic Data Structures Using Separation Logic, software, 2010
Authors: Dudka Kamil, Peringer Petr, Vojnar Tomáš
 Replay Tracer & BMC, software, 2010
Authors: Fiedor Jan, Hrubá Vendula, Křena Bohuslav, Letko Zdeněk, Vojnar Tomáš
 Search-based Testing Environment (SearchBestie), software, 2010
Authors: Letko Zdeněk, Vojnar Tomáš, Křena Bohuslav
 Tool for verification of systems described using the Modechart formalism, software, 2010
Authors: Gach Marek, Fiedor Jan, Češka Milan
 Tool for verification of systems specified in RT-Logic language, software, 2010
Authors: Fiedor Jan, Gach Marek, Češka Milan
2009Clock Domain Crossing Analyzer, software, 2009
Authors: Smrčka Aleš
 FAST to ARMC Translator, software, 2009
Authors: Smrčka Aleš
 FLATA, software, 2009
Authors: Konečný Filip, Vojnar Tomáš, Bozga Marius, Iosif Radu
 Tool for Computing Simulations, software, 2009
Authors: Holík Lukáš, Šimáček Jiří, Vojnar Tomáš
2008Java Atomicity Violation Detector & Healer, software, 2008
Authors: Letko Zdeněk, Vojnar Tomáš, Křena Bohuslav
 Model checking Using Symbolic Execution, software, 2008
Authors: Křena Bohuslav, Braione Pietro, Denaro Giovanni, Pezze Mauro
2007ARTMC - Abstract Regular Tree Model Checking, software, 2007
Authors: Rogalewicz Adam, Vojnar Tomáš
 Java Race Detector & Healer, software, 2007
Authors: Letko Zdeněk, Vojnar Tomáš, Křena Bohuslav
 Translator of VHDL Design to Counter Automaton, software, 2007
Authors: Smrčka Aleš, Vojnar Tomáš

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