Automated Analysis and Verification Research Group - VeriFIT

Team members

Češka Milan, prof. RNDr., CSc., UITS FIT VUT
  • Formal Languages Theory
  • Formal Specifications
  • Petri Nets Theory
  • System Modelling and Simulation
Češka Milan, RNDr., Ph.D., UITS FIT VUT
Fiedor Jan, Ing., Ph.D., UITS FIT VUT
Fiedor Tomáš, Ing., UITS FIT VUT
Havlena Vojtěch, Ing., UITS FIT VUT
Holík Lukáš, Mgr., Ph.D., UITS FIT VUT
  • Generally logic, automata, formal verification and analysis of computing systems. More specifically:
  • Efficient algorithms for finite automata
  • Verification of pointer programs
  • Verification of string manipulating programs
  • Verification of parallel systems
  • Decision procedures for logics (related to the above points)
Here is my DBLP.
Hruška Martin, Ing., UITS FIT VUT
  • Formal verification and program analysis
Charvát Lukáš, Ing., UITS FIT VUT
Janků Petr, Ing., UITS FIT VUT
Kotoun Michal, Bc., FIT VUT
Křena Bohuslav, Ing., Ph.D., UITS FIT VUT
  • Formal Analysis and Verification


Lengál Ondřej, Ing., Ph.D., UITS FIT VUT
Malík Viktor, Ing., UITS FIT VUT
Martiček Štefan, Ing., UITS FIT VUT
Matyáš Jiří, Ing., UITS FIT VUT
Peringer Petr, Dr. Ing., UITS FIT VUT
  • Modelling and Simulation
  • Program Verification (symbolic execution,  ...)
  • Object-oriented programming, Design patterns
  • C and C++ programming languages
Pluháčková Hana, Mgr. Bc., UITS FIT VUT
Rogalewicz Adam, doc. Mgr., Ph.D., UITS FIT VUT
Smrčka Aleš, Ing., Ph.D., UITS FIT VUT
  • Software testing, test automation
  • Modelling and verification of hardware designs
  • Dynamic analysis of concurrent programs
Šoková Veronika, Ing., UITS FIT VUT
Turoňová Lenka, Ing., UITS FIT VUT
Valeš Ondřej, Ing., FIT VUT
Vargovčík Pavol, Ing., UITS FIT VUT
Vojnar Tomáš, prof. Ing., Ph.D., UITS FIT VUT

Former team members

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