intMAN
version 0.2_20130422
Main Page
Design Unit List
Files
File List
int_buf_in.vhd
Go to the documentation of this file.
1
-------------------------------------------------------
2
--! @file
3
--! @brief Interrupt detect/buffer/config/forward
for
the intMAN hardware
4
--! @author Josef Strnadel, Brno University
of
Technology, Faculty
of
Information Technology
5
--! @email strnadel@fit.vutbr.cz
6
--! @date 2013-04-22
7
-------------------------------------------------------
8
9
library
IEEE
;
10
use
IEEE.STD_LOGIC_1164.
ALL
;
11
use
IEEE.NUMERIC_STD.
ALL
;
12
use
work.
intMAN_package
.
all
;
13
14
--
15
--
16
--
17
--!
Entity
of
the unit
for
detection/latch
of
an interrupt request (interface)
18
--
19
entity
int_req
is
20
Port
(
21
reset
:
in
STD_LOGIC
;
--! async. reset
22
level
:
in
t_intlevel_cfg
;
--! level-sensitivity
select
: log.
0
(
00
), log.
1
(
01
), no (
10
,
11
)
23
edge
:
in
t_intedge_cfg
;
--! edge-sensitivity
select
: rising (
01
), falling (
10
), both (
11
), no (
00
)
24
clk
:
in
STD_LOGIC
;
--! clock
25
int_in
:
in
STD_LOGIC
;
--! incomming interrupt line
26
int_new
:
out
STD_LOGIC
;
--!
new
interrupt-arrival flag
27
int_rdy
:
out
STD_LOGIC
--! pending/ready interrupt flag
28
)
;
29
end
int_req
;
30
31
--
32
--
33
--
34
--!
Architecture
of
the unit
for
detection/latch
of
an interrupt request (inner structure)
35
--
36
architecture
arch
of
int_req
is
37
--! D-storage
38
signal
signal_d
:
STD_LOGIC
;
39
--!
new
int line
40
signal
SIG_new_int
:
STD_LOGIC
;
41
--!
new
int flag/latch
42
signal
SIG_new_int_latch
:
STD_LOGIC
;
43
44
begin
45
-- interrupt sensitivity legend:
46
-- ----------------------------
47
-- level: log.
0
(
00
), log.
1
(
01
), no (
10
,
11
)
48
-- edge: rising (
01
), falling (
10
), both (
11
), no (
00
)
49
50
--!
process
for
detection/capturing
of
an arriving interrupt
51
process
(
clk
)
52
begin
53
if
(
clk
'
event
and
clk
=
'
1
'
)
then
-- rising edge
54
signal
_d
<=
int_in
;
55
end
if
;
56
end
process
;
57
58
SIG_new_int
<=
(
not
reset
)
and
59
(
(
(
not
signal_d
)
and
int_in
and
edge
(
0
)
)
-- rising edge detect + interrupt
signal
60
or
(
(
not
int_in
)
and
signal_d
and
edge
(
1
)
)
-- falling edge detect + interrupt
signal
61
or
(
(
not
int_in
)
and
(
not
level
(
1
)
)
and
(
not
level
(
0
)
)
)
-- log.0-level detect + interrupt
signal
62
or
(
int_in
and
(
not
level
(
1
)
)
and
(
level
(
0
)
)
)
-- log.1-level detect + interrupt
signal
63
)
;
64
65
--!
process
for
latching the pending interrupt request
66
newint_latch
:
process
(
reset
,
SIG_new_int
)
67
begin
68
if
(
SIG_new_int
=
'
1
'
)
then
69
SIG_new_int_latch
<=
'
1
'
;
70
elsif
(
reset
=
'
1
'
)
then
71
SIG_new_int_latch
<=
'
0
'
;
72
end
if
;
73
end
process
;
74
75
int_new
<=
SIG_new_int
;
76
int_rdy
<=
SIG_new_int_latch
;
77
end
arch
;
78
79
80
81
----------------------------------------------------------------------------------
82
library
IEEE
;
83
use
IEEE
.STD_LOGIC_1164.
ALL
;
84
use
IEEE
.NUMERIC_STD.
ALL
;
85
use
work.
intMAN_package
.
all
;
86
87
--
88
--
89
--
90
--!
Entity
of
the interrupt detect/buffer/config/forward unit
for
the intMAN hardware (interface)
91
--
92
entity
int_buf_in
is
93
Port
(
94
reset
:
in
STD_LOGIC
;
--! async reset
95
level
:
in
t_intlevel_cfg
;
--! level-sensitivity
select
: log.
0
(
00
), log.
1
(
01
), no (
10
,
11
)
96
edge
:
in
t_intedge_cfg
;
--! edge-sensitivity
select
: rising (
01
), falling (
10
), both (
11
), no (
00
)
97
clk
:
in
STD_LOGIC
;
--! clock
98
int_in
:
in
STD_LOGIC
;
--! incomming interrupt line
99
int_rdy
:
out
STD_LOGIC
;
--! line
to
signalize there
is
a ready/pending interrupt
100
int_cnt
:
out
t_intpend_cnt
;
--! number
of
ready/pending interrupts
101
int_pri_load
:
in
STD_LOGIC
;
--! priority update enable/disable
102
int_pri_new
:
in
STD_LOGIC_VECTOR
(
t_pri_width_range
)
;
--!
new
interrupt priority
103
int_pri
:
out
STD_LOGIC_VECTOR
(
t_pri_width_range
)
;
--! interrupt priority storage
104
int_sel
:
in
STD_LOGIC
;
--! interrupt forward logic enable
105
int_out
:
out
STD_LOGIC
--! line
to
forward the interrupt
106
)
;
107
end
int_buf_in
;
108
109
--
110
--
111
--
112
--!
Architecture
of
the interrupt detect/buffer/config/forward unit
for
the intMAN hardware (inner structure)
113
--
114
architecture
arch
of
int_buf_in
is
115
116
--!
component
for
detection/latch
of
an interrupt request
117
component
int_req
118
port
(
119
reset
:
in
STD_LOGIC
;
--! async. reset
120
level
:
in
t_intlevel_cfg
;
--! level-sensitivity
select
: log.
0
(
00
), log.
1
(
01
), no (
10
,
11
)
121
edge
:
in
t_intedge_cfg
;
--! edge-sensitivity
select
: rising (
01
), falling (
10
), both (
11
), no (
00
)
122
clk
:
in
STD_LOGIC
;
--! clock
123
int_in
:
in
STD_LOGIC
;
--! incomming interrupt line
124
int_new
:
out
STD_LOGIC
;
--!
new
interrupt-arrival flag
125
int_rdy
:
out
STD_LOGIC
--! pending/ready interrupt flag
126
);
127
end
component
;
128
129
--! D-latch
130
signal
signal_d
:
STD_LOGIC
;
131
--! interrupt ready
132
signal
SIG_rdy
:
STD_LOGIC
;
133
--! interrupt request reset
134
signal
SIG_rst
:
STD_LOGIC
;
135
--! pending interrupts counter
136
signal
SIG_cnt
:
t_intpend_cnt
;
137
--! priority
138
signal
SIG_pri
:
STD_LOGIC_VECTOR
(
t_pri_width_range
)
;
139
140
--! level match flag
141
signal
SIG_int_l
:
STD_LOGIC
;
142
--! edge match flag
143
signal
SIG_int_e
:
STD_LOGIC
;
144
--! incomming interrupt line
145
signal
SIG_int
:
STD_LOGIC
;
146
--!
new
interrupt flag
147
signal
SIG_int_new
:
STD_LOGIC
;
148
--!
to
service forward flag
149
signal
SIG_service
:
STD_LOGIC
;
150
151
begin
152
--
153
--
154
--
155
--
port
map
section
156
--
157
158
--! mapping ports
to
the interrupt request detect/latch unit (
port
map
)
159
INTREQ
:
int_req
160
port
map
161
(
162
reset
=>
SIG_rst
,
163
level
=>
level
,
164
edge
=>
edge
,
165
clk
=>
clk
,
166
int_in
=>
int_in
,
167
int_new
=>
SIG_int_new
,
168
int_rdy
=>
SIG_rdy
169
)
;
170
171
SIG_rst
<=
reset
or
SIG_service
;
172
173
--! control
process
of
the interrupt detect/buffer/config/forward unit
174
process
(
reset
,
clk
,
int_pri_load
,
int_sel
)
175
begin
176
if
(
reset
=
'
1
'
)
then
-- reset (async.)
177
SIG_cnt
<=
0
;
178
elsif
(
SIG_int_new
'
event
and
SIG_int_new
=
'
1
'
)
then
--
new
interrupt arrival (async.)
179
SIG_cnt
<=
SIG_cnt
+
1
;
180
elsif
(
clk
'
event
and
clk
=
'
1
'
)
then
-- clk-synchronous storage operations
181
if
(
int_pri_load
=
'
1
'
)
then
-- ... interrupt priority update enable
182
SIG_pri
<=
int_pri_new
;
183
elsif
(
int_sel
=
'
1
'
)
then
-- ...
if
an interrupt
is
to
be forwarded, signalize it
184
SIG_service
<=
'
1
'
;
185
186
if
(
SIG_cnt
>
0
)
then
187
SIG_cnt
<=
SIG_cnt
-
1
;
-- ...
and
decrease the pending-interrupt counter
188
end
if
;
189
else
190
SIG_service
<=
'
0
'
;
191
end
if
;
192
193
-- interrupt sensitivity legend:
194
-- ----------------------------
195
-- level: log.
0
(
00
), log.
1
(
01
), no (
10
,
11
)
196
-- edge: rising (
01
), falling (
10
), both (
11
), no (
00
)
197
198
case
level
is
199
when
"00"
=
>
SIG_int_l
<=
(
'
0
'
or
not
int_sel
)
;
200
when
"01"
=
>
SIG_int_l
<=
(
'
1
'
and
int_sel
)
;
201
when
others
=
>
SIG_int_l
<=
SIG_int_l
or
'
0
'
;
202
end
case
;
203
204
case
edge
is
205
when
"01"
=
>
SIG_int_e
<=
(
'
1
'
and
int_sel
)
;
206
when
"10"
=
>
SIG_int_e
<=
(
'
0
'
or
not
int_sel
)
;
207
when
"11"
=
>
SIG_int_e
<=
(
'
1
'
and
int_sel
)
;
208
when
others
=
>
SIG_int_e
<=
SIG_int_e
or
'
0
'
;
209
end
case
;
210
211
int_out
<=
SIG_int_l
or
SIG_int_e
;
-- forward the interrupt according
to
its config
212
end
if
;
213
end
process
;
214
215
gen1
:
for
i
in
0
to
int_pri
'
LENGTH
-
1
generate
-- interrupt priority
is
valid only
if
the request
is
pending/ready
216
int_pri
(
i
)
<=
(
SIG_pri
(
i
)
or
(
not
SIG_rdy
)
)
;
217
end
generate
gen1
;
218
219
int_cnt
<=
SIG_cnt
;
220
int_rdy
<=
SIG_rdy
;
221
222
end
arch
;
© 2013 Josef Strnadel (
email
,
web
), Faculty of Information Technology, Brno University of Technology (
web
)