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Dvořák, V., Mikušek, P.: On the cascade realization of sparse logic functions, In: Euromicro Proceedings, Oulu, FI, IEEE CS, 2011, p. 21-28, ISBN 978-0-7695-4494-6

Publication language:

english

Original title:

On the cascade realization of sparse logic functions

Title (cs):

Kaskádní realizace řídkých logických funkcí

Pages:

21-28

Proceedings:

Euromicro Proceedings

Conference:

14th Euromicro conference on Digital System Design

Place:

Oulu, FI

Year:

2011

ISBN:

978-0-7695-4494-6

Publisher:

IEEE Computer Society

Files:

Keywords

Boolean functions, multi-terminal binary decision diagrams MTBDDs, LUT cascades, area-time complexity

Annotation

Representation of multiple-output logic functions by Multi-Terminal Binary Decision Diagrams (MTBDDs) is studied for the useful class of sparse logic functions specified by the number of true min-terms. This paper derives upper bounds on the MTBDD width, which determine the size of look-up tables (LUTs) needed for hardware realization of these functions in FPGA logic synthesis. The obtained bounds are generalization of similar known bounds for single-output logic functions. Finally a procedure how to find the optimum mapping of MTBDD to a LUT cascade is presented and illustrated on a set of benchmarks.

BibTeX:

@INPROCEEDINGS{
   author = {Václav Dvořák and Petr Mikušek},
   title = {On the cascade realization of sparse logic functions},
   pages = {21--28},
   booktitle = {Euromicro Proceedings},
   year = {2011},
   location = {Oulu, FI},
   publisher = {IEEE Computer Society},
   ISBN = {978-0-7695-4494-6},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=9562}
}

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