Conference paper

KOŘENEK Jan and KEKELY Michal. Mapping of P4 Match Action Tables to FPGA. In: Preceedings of 27TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS. Ghent: Institute of Electrical and Electronics Engineers, 2017, pp. 1-2. ISBN 978-90-90-30428-1.
Publication language:english
Original title:Mapping of P4 Match Action Tables to FPGA
Title (cs):Mapování P4 vyhledávacích tabulek do FPGA
Pages:1-2
Proceedings:Preceedings of 27TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS
Conference:27TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS
Place:Ghent, BE
Year:2017
ISBN:978-90-90-30428-1
Publisher:Institute of Electrical and Electronics Engineers
Keywords
P4, FPGA, packet classification, match action tables
Annotation
Current networks are changing very fast. Network administrators need
more flexible and powerful tools to be able to support new protocols or services very fast. The P4 language provides new level of abstraction for flexible packet processing. Therefore, we have designed new architecture for memory efficient mapping of P4 match/action tables to FPGA. The architecture is based on DCFL algorithm and is able to balance the processing speed and available memory resources.
BibTeX:
@INPROCEEDINGS{
   author = {Jan Ko{\v{r}}enek and Michal Kekely},
   title = {Mapping of P4 Match Action Tables to FPGA},
   pages = {1--2},
   booktitle = {Preceedings of 27TH INTERNATIONAL CONFERENCE ON
	FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS},
   year = 2017,
   location = {Ghent, BE},
   publisher = {Institute of Electrical and Electronics Engineers},
   ISBN = {978-90-90-30428-1},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=11551}
}

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