Článek ve sborníku konference

SZURMAN Karel, MIČULKA Lukáš a KOTÁSEK Zdeněk. Towards a State Synchronization Methodology for Recovery Process after Partial Reconfiguration of Fault Tolerant Systems. In: 9th IEEE International Conference on Computer Engineering and Systems. Káhira: IEEE Computer Society, 2014, s. 231-236. ISBN 978-1-4799-6593-9.
Jazyk publikace:angličtina
Název publikace:Towards a State Synchronization Methodology for Recovery Process after Partial Reconfiguration of Fault Tolerant Systems
Název (cs):Směrem k metodice pro synchronizaci stavu systému odolného proti poruchám po jeho obnově a částečné rekonfiguraci
Strany:231-236
Sborník:9th IEEE International Conference on Computer Engineering and Systems
Konference:9th IEEE International Conference on Computer Engineering and Systems
Místo vydání:Káhira, EG
Rok:2014
ISBN:978-1-4799-6593-9
DOI:10.1109/ICCES.2014.7030963
Vydavatel:IEEE Computer Society
Klíčová slova
state synchronization, recovery, partial dynamic reconfiguration, fault tolerance, FPGA
Anotace
Článek popisuje základní body nové metodiky pro návrh, implementaci a klasifikaci metod pro synchronizaci stavu systému odolného proti poruchám implementovaném na SRAM FPGA po jeho opravě pomocí částečné dynamické rekonfigurace. Jsou definovány základní body, které musí každá metoda splňovat. Dále jsou popsány dynamické a statické parametry, které mohou ovlivňovat cílový systém, pro který je synchronizace navržena. Dále je popsána obecná architektura pro implementaci synchronizace do systému odolného proti poruchám. Základní principy metodiky jsou ověřeny na implementaci synchronizace pro rekonfigurovatelný řídicí systém CAN sběrnice.
Abstrakt
Modern fault tolerant systems implemented into FPGAs integrate very often hardware redundancy together with fault tolerant approaches based on active fault recovery and the system reconfiguration. Space and safety-critical applications are examples of systems where the principles of fault tolerance and recovery techniques have increasing importance. Except of fault-masking behavior and FPGA partial reconfiguration, also the synchronization of reconfigured circuit copy with remaining circuits which are during the recovery process still operating, is an integral part of the recovery process in these systems. The synchronization process is closely related to the system architecture, specific requirements and functionality. Our aim is to propose specific methodology to design and implement the most suitable synchronization procedure for the recovery of target fault tolerant system. In this paper, basic principles of our synchronization methodology are described together with generic architecture for synchronization in fault tolerant systems, which was designed for reconfigurable fault tolerant CAN bus control system. This system and performed experiments are in the paper described as well.
BibTeX:
@INPROCEEDINGS{
   author = {Karel Szurman and Luk{\'{a}}{\v{s}} Mi{\v{c}}ulka and
	Zden{\v{e}}k Kot{\'{a}}sek},
   title = {Towards a State Synchronization Methodology for Recovery
	Process after Partial Reconfiguration of Fault Tolerant
	Systems},
   pages = {231--236},
   booktitle = {9th IEEE International Conference on Computer Engineering
	and Systems},
   year = {2014},
   location = {K{\'{a}}hira, EG},
   publisher = {IEEE Computer Society},
   ISBN = {978-1-4799-6593-9},
   doi = {10.1109/ICCES.2014.7030963},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php.cs.iso-8859-2?id=10793}
}

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