Článek ve sborníku konference

STRAKA Martin, KAŠTIL Jan a KOTÁSEK Zdeněk. Modern Fault Tolerant Architectures Based on Partial Dynamic Reconfiguration in FPGAs. In: Proceedings of the 2010 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems DDECS 2010. Wien: IEEE Computer Society, 2010, s. 173-176. ISBN 978-1-4244-6610-8.
Jazyk publikace:angličtina
Název publikace:Modern Fault Tolerant Architectures Based on Partial Dynamic Reconfiguration in FPGAs
Název (cs):Pokročilé architektury odolné proti poruchám založené na částečné dynamické rekonfiguraci
Strany:173-176
Sborník:Proceedings of the 2010 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems DDECS 2010
Konference:IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2010
Místo vydání:Wien, AT
Rok:2010
ISBN:978-1-4244-6610-8
Vydavatel:IEEE Computer Society
Klíčová slova
odolnost proti poruchám, hlídací obvod, architektura, TMR, duplex, FPGA, rekonfigurace
Anotace

V příspěvku jsou prezentovány pokročilé odolné architektury pro návrh systémů odolných proti poruchám do SRAM FPGA s využitím částečné dynamické rekonfigurace.

Abstrakt

Activities which aim at developing a methodology of fault tolerant systems design into FPGA platforms are presented. Basic principles of partial reconfiguration are described together with the fault tolerant architectures based on the partial dynamic reconfiguration and triple modular redundancy or duplex system. Several architectures using online checkers for error detection which initiates reconfiguration process of the faulty unit are introduced as well. The modification of fault tolerant architectures into partial reconfigurable modules and main advantages of partial dynamic reconfiguration when used in fault tolerant system design are demonstrated. All presented architectures are compared with each other and proven fully functional on the ML506 development board with Virtex5 for different types of RTL digital components.

BibTeX:
@INPROCEEDINGS{
   author = {Martin Straka and Jan Ka{\v{s}}til and
	Zden{\v{e}}k Kot{\'{a}}sek},
   title = {Modern Fault Tolerant Architectures Based on
	Partial Dynamic Reconfiguration in FPGAs},
   pages = {173--176},
   booktitle = {Proceedings of the 2010 IEEE Symposium on Design and
	Diagnostics of Electronic Circuits and Systems DDECS 2010},
   year = {2010},
   location = {Wien, AT},
   publisher = {IEEE Computer Society},
   ISBN = {978-1-4244-6610-8},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php.cs?id=9177}
}

Vaše IPv4 adresa: 184.73.14.222
Přepnout na https