Článek ve sborníku konference

STRAKA Martin, KAŠTIL Jan a KOTÁSEK Zdeněk. Fault Tolerant Structure for SRAM-based FPGA via Partial Dynamic Reconfiguration. In: 13th EUROMICRO Conference on Digital System Design, DSD'2010. Lille: IEEE Computer Society, 2010, s. 365-372. ISBN 978-0-7695-4171-6.
Jazyk publikace:angličtina
Název publikace:Fault Tolerant Structure for SRAM-based FPGA via Partial Dynamic Reconfiguration
Název (cs):Struktura odolného systému pro SRAM FPGA s využitím částečné dynamické rekonfigurace
Strany:365-372
Sborník:13th EUROMICRO Conference on Digital System Design, DSD'2010
Konference:13th EUROMICRO Conference on Digital System Design, DSD'2010
Místo vydání:Lille, FR
Rok:2010
ISBN:978-0-7695-4171-6
Vydavatel:IEEE Computer Society
Klíčová slova
systém odolný proti poruchám, rekonfigurace, řadič, FPGA, architektura
Anotace

V příspěvku je prezentován přístup pro vytváření spolehlivých systémů do SRAM FPGA ovvodů s využitím částečné dynamické rekonfigurace.

Abstrakt

In this paper, activities which aim at developing a methodology of fault tolerant systems design into SRAM-based FPGA platforms with different types of diagnostic approaches are presented. Basic principles of partial dynamic reconfiguration are described together with their impact on the fault tolerance of the digital design in FPGA. A generic controller for driving dynamic reconfiguration process of faulty unit is demonstrated and analyzed. Parameters of the generic partial reconfiguration controller are experimentally verified. The developed controller is compared with other approaches based on micro-controllers inside FPGA. A structure which can be used in fault tolerant system design into SRAM-based FPGA using partial reconfiguration controller is then described. The presented structure is proven fully functional on the ML506 development board for different types of RTL components.

BibTeX:
@INPROCEEDINGS{
   author = {Martin Straka and Jan Ka{\v{s}}til and
	Zden{\v{e}}k Kot{\'{a}}sek},
   title = {Fault Tolerant Structure for SRAM-based FPGA via
	Partial Dynamic Reconfiguration},
   pages = {365--372},
   booktitle = {13th EUROMICRO Conference on Digital System Design, DSD'2010},
   year = 2010,
   location = {Lille, FR},
   publisher = {IEEE Computer Society},
   ISBN = {978-0-7695-4171-6},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php.cs?id=9208}
}

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