Conference paper

DOBAI Roland, GLETTE Kyrre, TORRESEN Jim and SEKANINA Lukáš. Evolutionary Digital Circuit Design with Fast Candidate Solution Establishment in Field Programmable Gate Arrays. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 85-92. ISBN 978-1-4799-4480-4. Available from: http://dx.doi.org/10.1109/ICES.2014.7008726
Publication language:english
Original title:Evolutionary Digital Circuit Design with Fast Candidate Solution Establishment in Field Programmable Gate Arrays
Title (cs):Evoluční návrh obvodů s rychlou rekonfiguraci v programovatelné hradlové pole
Pages:85-92
Proceedings:2014 IEEE International Conference on Evolvable Systems Proceedings
Conference:IEEE Symposium Series on Computational Intelligence
Place:Piscataway, US
Year:2014
URL:http://dx.doi.org/10.1109/ICES.2014.7008726
ISBN:978-1-4799-4480-4
Publisher:Institute of Electrical and Electronics Engineers
Keywords
evolutionary design, mutation, reconfiguration, image filters, Zynq.
Annotation
Field programmable gate arrays (FPGAs) are a popular platform for evolving digital circuits. FPGAs allow to be reconfigured partially which provides a natural way of establishing candidate solutions. Recent research focuses on the hardware implementation of evolutionary design platforms. Several approaches were developed for effective implementation of candidate solutions in FPGAs. In this paper a new mutation operator is proposed for evolutionary algorithms. The chromosome representing the candidate solution is mutated in such a way that only one configuration frame is required for establishing the mutated candidate solution in hardware. The experimental results confirmed that the reduced number of configuration frames and mutations at lower level of granularity ensure faster evolution, generation of more candidate solutions in a given time and solutions with better quality.
BibTeX:
@INPROCEEDINGS{
   author = {Roland Dobai and Kyrre Glette and Jim Torresen and
	Luk{\'{a}}{\v{s}} Sekanina},
   title = {Evolutionary Digital Circuit Design with Fast Candidate
	Solution Establishment in Field Programmable Gate Arrays},
   pages = {85--92},
   booktitle = {2014 IEEE International Conference on Evolvable Systems
	Proceedings},
   year = {2014},
   location = {Piscataway, US},
   publisher = {Institute of Electrical and Electronics Engineers},
   ISBN = {978-1-4799-4480-4},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php.en?id=10647}
}

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