Conference paper

DVOŘÁK Václav and MIKUŠEK Petr. On the cascade realization of sparse logic functions. In: Euromicro Proceedings. Oulu: IEEE Computer Society, 2011, pp. 21-28. ISBN 978-0-7695-4494-6.
Publication language:english
Original title:On the cascade realization of sparse logic functions
Title (cs):Kaskádní realizace řídkých logických funkcí
Proceedings:Euromicro Proceedings
Conference:14th Euromicro conference on Digital System Design
Place:Oulu, FI
Publisher:IEEE Computer Society
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iconPID1855801.pdfDSD 2011 Oulu316 KB2011-06-09 11:17:53
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Boolean functions, multi-terminal binary decision diagrams MTBDDs, LUT cascades,  area-time complexity
Representation of multiple-output logic functions by Multi-Terminal Binary Decision Diagrams (MTBDDs) is studied for the useful class of sparse logic functions specified by the number of true min-terms. This paper derives upper bounds on the MTBDD width, which determine the size of look-up tables (LUTs) needed for hardware realization of these functions in FPGA logic synthesis. The obtained bounds are generalization of similar known bounds for single-output logic functions. Finally a procedure how to find the optimum mapping of MTBDD to a LUT cascade is presented and illustrated on a set of benchmarks.
   author = {V{\'{a}}clav Dvo{\v{r}}{\'{a}}k and Petr
   title = {On the cascade realization of sparse logic
   pages = {21--28},
   booktitle = {Euromicro Proceedings},
   year = 2011,
   location = {Oulu, FI},
   publisher = {IEEE Computer Society},
   ISBN = {978-0-7695-4494-6},
   language = {english},
   url = {}

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