Conference paper

PÁNEK Richard. Systémy odolné proti poruchám - metodika návrhu řadiče rekonfigurace. In: Počítačové architektury & diagnostika 2017. Smolenice: Slovak University of Technology in Bratislava, 2017, pp. 24-27. ISBN 978-80-972784-0-3.
Publication language:czech
Original title:Systémy odolné proti poruchám - metodika návrhu řadiče rekonfigurace
Title (en):Fault Tolerant Systems - Reconfiguration controller design methodology
Proceedings:Počítačové architektury & diagnostika 2017
Conference:Počítačové architektury a diagnostika 2017
Place:Smolenice, SK
Publisher:Slovak University of Technology in Bratislava
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iconPAD_2017_panek.pdf490 KB2017-09-18 14:41:15
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Reconfiguration controller, Fault Tolerant Systems, Partial Dynamic reconfiguration, FPGA
The failures occurrences are very undesirable for not only critical control systems. Especially if it could lead to injury or financial loss. Therefore, techniques known as fault tolerant systems have been developed. Reconfiguration is especially useful for faults mitigation. The FPGA is an eligible reconfigured platform for designing and implementing circuits. A partial dynamic reconfiguration controller, which is a specially added component is highly beneficial to use for some FPGA circuit reparation by reconfiguration. Furthermore, it is desirable that the controller has fault tolerant, especially when it is placed in the same FPGA with desired circuit. The methodology, which will also be the topic of my dissertation will deal with this controller design and the developing of the relevant criteria.
   author = {Richard P{\'{a}}nek},
   title = {Syst{\'{e}}my odoln{\'{e}} proti poruch{\'{a}}m - metodika
	n{\'{a}}vrhu {\v{r}}adi{\v{c}}e rekonfigurace},
   pages = {24--27},
   booktitle = {Po{\v{c}}{\'{i}}ta{\v{c}}ov{\'{e}} architektury \&
	diagnostika 2017},
   year = {2017},
   location = {Smolenice, SK},
   publisher = {Slovak University of Technology in Bratislava},
   ISBN = {978-80-972784-0-3},
   language = {czech},
   url = {}

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