Conference paper

SEKANINA Lukáš and DRÁBEK Vladimír. Automatic Design of Image Operators Using Evolvable Hardware. In: Proc. of 5th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Brno: Brno University of Technology, 2002, pp. 132-139. ISBN 80-214-2094-4.
Publication language:english
Original title:Automatic Design of Image Operators Using Evolvable Hardware
Title (cs):Automatický návrh obrazových operátorů s využitím vyvíjejících se obvodů
Pages:132-139
Proceedings:Proc. of 5th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop
Conference:IEEE Design and Diagnostics of Electronic Circuits and Systems 2002
Place:Brno, CZ
Year:2002
ISBN:80-214-2094-4
Publisher:Brno University of Technology
URL:http://www.fit.vutbr.cz/~sekanina/publ/ddecs02/ddecs02.pdf [PDF]
Keywords
evolvable hardware, image operators, evolutionary design, FPGA
Annotation
An original approach to automatic design of image operators is presented in this paper. The proposed solution employs evolvable hardware at simplified functional level and produces image operators (digital circuits), which can compete against traditional designs in terms of quality and implementation cost in Xilinx's chips.
BibTeX:
@INPROCEEDINGS{
   author = {Luk{\'{a}}{\v{s}} Sekanina and Vladim{\'{i}}r Dr{\'{a}}bek},
   title = {Automatic Design of Image Operators Using Evolvable Hardware},
   pages = {132--139},
   booktitle = {Proc. of 5th IEEE Design and Diagnostics of Electronic
	Circuits and Systems Workshop},
   year = {2002},
   location = {Brno, CZ},
   publisher = {Brno University of Technology},
   ISBN = {80-214-2094-4},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=6896}
}

Your IPv4 address: 54.158.55.5
Switch to IPv6 connection

DNSSEC [dnssec]