Conference paper

BRYAN Luděk, MAREK Tomáš and NOVOTNÝ Martin. Design and Implementation of the Memory Scheduler for the FPGA - Based Router. In: Proc. of the Field Programmable Logic and Application 2004. Leuven: Springer Verlag, 2004, pp. 1133-1139. ISBN 3-540-22989-2.
Publication language:english
Original title:Design and Implementation of the Memory Scheduler for the FPGA - Based Router
Title (cs):Design a implementace paměťového řadiče pro router na bázi FPGA
Pages:1133-1139
Proceedings:Proc. of the Field Programmable Logic and Application 2004
Conference:The International Conference on Field- Programmable Logic and Applications
Place:Leuven, BE
Year:2004
ISBN:3-540-22989-2
Publisher:Springer Verlag
Keywords
FPGA, DDR SDRAM, memory, router, IPV6
Annotation
This paper deals with a design of a memory scheduler as a part of the Liberouter project.
BibTeX:
@INPROCEEDINGS{
   author = {Lud{\v{e}}k Bryan and Tom{\'{a}}{\v{s}} Marek and Martin
	Novotn{\'{y}}},
   title = {Design and Implementation of the Memory Scheduler for the
	FPGA - Based Router},
   pages = {1133--1139},
   booktitle = {Proc. of the Field Programmable Logic and Application 2004},
   year = {2004},
   location = {Leuven, BE},
   publisher = {Springer Verlag},
   ISBN = {3-540-22989-2},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=7636}
}

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