Conference paper

KOTÁSEK Zdeněk, STRNADEL Josef and PEČENKA Tomáš. Methodology of Selecting Scan-Based Testability Improving Technique. In: Proc. of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop. Sopron: University of West Hungary, 2005, pp. 186-189. ISBN 963-9364-48-7.
Publication language:english
Original title:Methodology of Selecting Scan-Based Testability Improving Technique
Title (cs):Methodology of Selecting Scan-Based Testability Improving Technique
Pages:186-189
Proceedings:Proc. of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop
Conference:The 8th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
Place:Sopron, HU
Year:2005
ISBN:963-9364-48-7
Publisher:University of West Hungary
URL:http://www.fit.vutbr.cz/~pecenka/pubs/2005_ddecs_scan.pdf [PDF]
Keywords
design for testability, scan method, testable core
Annotation
In the paper, the solution of the problem of selecting the most optimal design-for-testability technique for register-transfer level digital circuits is demonstrated. A decision-making process that is able to solve the problem over a set of scan-based techniques is presented in the paper. The process decides among following testability improving techniques: identification of testable cores, covering of feedback loops by minimum set of scan registers, selection of registers into scan chains to achieve high level of parallelism during the test application.
BibTeX:
@INPROCEEDINGS{
   author = {Zden{\v{e}}k Kot{\'{a}}sek and Josef Strnadel and
	Tom{\'{a}}{\v{s}} Pe{\v{c}}enka},
   title = {Methodology of Selecting Scan-Based Testability Improving
	Technique},
   pages = {186--189},
   booktitle = {Proc. of 8th IEEE Design and Diagnostic of Electronic
	Circuits and Systems Workshop},
   year = {2005},
   location = {Sopron, HU},
   publisher = {University of West Hungary},
   ISBN = {963-9364-48-7},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=7747}
}

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