Conference paper

RŮŽIČKA Richard. On the Petri Net Based Test Scheduling. In: Proceedings of the Work in Progress Session at Euromicro SEAA/DSD 2005. Linz: Johannes Kepler University Linz, 2005, pp. 18-19. ISBN 3-902457-09-0.
Publication language:english
Original title:On the Petri Net Based Test Scheduling
Title (cs):K plánování testu založeném na Petriho sítích
Pages:18-19
Proceedings:Proceedings of the Work in Progress Session at Euromicro SEAA/DSD 2005
Conference:8th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN
Place:Linz, DE
Year:2005
ISBN:3-902457-09-0
Publisher:Johannes Kepler University Linz
Keywords
RTL digital circuit testability, test scheduling optimization
Annotation
This paper discusses some problems with test scheduling optimization of register transfer level (RTL) digital circuit design. The Petri net model, previously proposed for testability verification purposes is now used as a base of C/E system which models test application process. To schedule application of test patterns to elements of a circuit under test, possibility of concurrency must be considered firstly. Parallelism during test application process can significantly reduce time of testing. Another advantage of the approach is that all methods are described formally and are proved.
BibTeX:
@INPROCEEDINGS{
   author = {Richard R{\r{u}}{\v{z}}i{\v{c}}ka},
   title = {On the Petri Net Based Test Scheduling},
   pages = {18--19},
   booktitle = {Proceedings of the Work in Progress Session at Euromicro
	SEAA/DSD 2005},
   year = {2005},
   location = {Linz, DE},
   publisher = {Johannes Kepler University Linz},
   ISBN = {3-902457-09-0},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=7847}
}

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