Publication Details
Generating Synthetic Benchmark Circuits with Predefined Testability Properties
benchmark circuits, evolutionary design
The paper describes the utilization of evolutionary algorithms for automatic discovery of benchmark circuits. The main objective of the paper is to show that relatively large and complex (benchmark) circuits with predefined testability properties can be evolved in case that only a given property (e.g. testability) is required and the function of the circuit is
not considered. Fitness evaluation for the proposed algorithm is based on testability analy\-sis with linear time complexity. During the evolution, the solutions which are refused to be synthesized by a design system are excluded from the process of developing a new generation of benchmark circuits. The fulfilment of testability properties of generated circuits was verified by professional ATPG (Automated Test Pattern Generation) tool.
@INPROCEEDINGS{FITPUB7955,
author = "Tom\'{a}\v{s} Pe\v{c}enka",
title = "Generating Synthetic Benchmark Circuits with Predefined Testability Properties",
pages = "200--209",
booktitle = "Pre-Proc. 1st Doctoral Workshop on Mathematical and Engineering Methods in Computer Science",
year = 2005,
location = "Brno, CZ",
language = "english",
url = "https://www.fit.vut.cz/research/publication/7955"
}