Conference paper

PEČENKA Tomáš and KOTÁSEK Zdeněk. I-path Scheduling Algorithm for RT Level Circuits. In: MEMICS 2006 2nd Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Mikulov, 2006, pp. 174-181. ISBN 80-214-3287-X.
Publication language:english
Original title:I-path Scheduling Algorithm for RT Level Circuits
Title (cs):Algoritmus plánování I-cest v obvodu na úrovni RT
Pages:174-181
Proceedings:MEMICS 2006 2nd Doctoral Workshop on Mathematical and Engineering Methods in Computer Science
Conference:2nd Doctoral Workshop on Mathematical and Engineering Methods in Computer Science -- MEMICS'06
Place:Mikulov, CZ
Year:2006
ISBN:80-214-3287-X
Keywords
i-path, scheduling, backtracking
Annotation
In the paper, a new approach for scheduling i-paths in Register Transfer (RT) level circuits is presented. The proposed algorithm is able to schedule i-paths not only in circuit structure, but also in time. At the beginning, the formal model for modelling data-path of structurally described RT level circuits is defined. This model is then used to define the i-path concept. The main part of the paper is devoted to introduce a method for i-path scheduling. The method is able to monitor component utilization in time and it is able to detect and solve conflicts between i-paths.
BibTeX:
@INPROCEEDINGS{
   author = {Tom{\'{a}}{\v{s}} Pe{\v{c}}enka and Zden{\v{e}}k
	Kot{\'{a}}sek},
   title = {I-path Scheduling Algorithm for RT Level Circuits},
   pages = {174--181},
   booktitle = {MEMICS 2006 2nd Doctoral Workshop on Mathematical and
	Engineering Methods in Computer Science},
   year = {2006},
   location = {Mikulov, CZ},
   ISBN = {80-214-3287-X},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=8220}
}

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