Journal article

DVOŘÁK Václav. Efficient Evaluation of Multiple-Output Boolean Functions in Embedded Software or Firmware. Journal of Software. Oulu: 2007, vol. 2, no. 5, pp. 52-63. ISSN 1796-217X.
Publication language:english
Original title:Efficient Evaluation of Multiple-Output Boolean Functions in Embedded Software or Firmware
Title (cs):Efektivní evaluace vícevýstupových boolovských funkcí ve vestavěném software nebo firmware
Pages:52-63
Place:FI
Year:2007
Journal:Journal of Software, Vol. 2, No. 5, Oulu, FI
ISSN:1796-217X
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Keywords
Embedded software, Boolean function evaluation, Binary Decision Diagrams, LUT cascades   
Annotation
The paper addresses software and firmware implementation of multiple-output Boolean functions based on cascades of Look-Up Tables (LUTs). A LUT cascade is described as a means of compact representation of a large class of sparse Boolean functions, evaluation of which then reduces to multiple indirect memory accesses. The method is compared to a technique of direct PLA emulation and is illustrated on examples. A specialized micro-engine is proposed for even faster evaluation than is possible with universal microprocessors. The presented method is flexible in making trade-offs between performance and memory footprint and may be useful for embedded applications where the processing speed is not critical. Evaluation may run on various CPUs and DSP cores or slightly faster on FPGA-based micro-programmed controllers.
BibTeX:
@ARTICLE{
   author = {V{\'{a}}clav Dvo{\v{r}}{\'{a}}k},
   title = {Efficient Evaluation of Multiple-Output Boolean Functions in
	Embedded Software or Firmware},
   pages = {52--63},
   journal = {Journal of Software},
   volume = {2},
   number = {5},
   year = {2007},
   ISSN = {1796-217X},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=8405}
}

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