Conference paper

DEDEK Tomáš, MAREK Tomáš and MARTÍNEK Tomáš. High Level Abstraction Language as an Alternative to Embeded Processors for Internet Packet Processing in FPGA. In: 2007 International Conference on Field Programmable Logic and Applications. Amsterdam: IEEE Computer Society, 2007, pp. 648-651. ISBN 1-4244-1060-6.
Publication language:english
Original title:High Level Abstraction Language as an Alternative to Embeded Processors for Internet Packet Processing in FPGA
Title (cs):Vysokoúrovňový jazyk jako alternativa k vestavěným procesorům pro zpracování Internetového provozu
Pages:648-651
Proceedings:2007 International Conference on Field Programmable Logic and Applications
Conference:The International Conference on Field Programmable Logic and Applications
Place:Amsterdam, US
Year:2007
ISBN:1-4244-1060-6
Publisher:IEEE Computer Society
Keywords
Internet packet processing, Embeded processors, Handel-C, FPGA
Annotation
In this paper, we investigate three different realizations
of the same block from different points of view. The mentioned
different realizations include two realizations with
embedded processors (custom 16-bit RISC processor and
general soft-core processor) and the third realization uses
Handel-C as an example of synthesisable high-level abstraction
languages.
The results show that development time of complete
solution (HW and SW) is approximately the same for the
Handel-C design and the design with soft-core processor;
the development time of the Custom 16-bit RISC processor
is about five times higher. Moreover, the throughput of the
Handel-C design measured in the number of bits processed
in one second is the highest. The obtained frequency and
occupied area of the Handel-C design depends on the complexity
of the used program. However, results are comparable
or even better than results of the embedded processors.
BibTeX:
@INPROCEEDINGS{
   author = {Tom{\'{a}}{\v{s}} Dedek and Tom{\'{a}}{\v{s}} Marek and
	Tom{\'{a}}{\v{s}} Mart{\'{i}}nek},
   title = {High Level Abstraction Language as an Alternative to Embeded
	Processors for Internet Packet Processing in FPGA},
   pages = {648--651},
   booktitle = {2007 International Conference on Field Programmable Logic
	and Applications},
   year = {2007},
   location = {Amsterdam, US},
   publisher = {IEEE Computer Society},
   ISBN = {1-4244-1060-6},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=8413}
}

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