Conference paper

VAŠÍČEK Zdeněk and SEKANINA Lukáš. Novel Hardware Implementation of Adaptive Median Filters. In: Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop. Bratislava: IEEE Computer Society, 2008, pp. 110-115. ISBN 978-1-4244-2276-0.
Publication language:english
Original title:Novel Hardware Implementation of Adaptive Median Filters
Title (cs):Nová obvodová implementace adaptivního mediánového filtru
Pages:110-115
Proceedings:Proc. of 2008 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop
Conference:IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop
Place:Bratislava, SK
Year:2008
ISBN:978-1-4244-2276-0
Publisher:IEEE Computer Society
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Keywords
adaptive median filter, image processing, FPGA,
Annotation

A new FPGA implementation for adaptive median filters is proposed. Adaptive median filters exhibit better filtering properties than standard median filters; however, their implementation cost is higher. Proposed architecture was optimized for throughput allowing 300M pixels to be filtered per second. The best performance/cost ratio exhibits the adaptive median filter which utilizes filtering window 7x7 pixels and can suppress shot noise with intensity up to 60%. In addition to filtering, adaptive median filters can be also used as detectors of corrupted pixels (detection statistics).

BibTeX:
@INPROCEEDINGS{
   author = {Zden{\v{e}}k Va{\v{s}}{\'{i}}{\v{c}}ek and Luk{\'{a}}{\v{s}}
	Sekanina},
   title = {Novel Hardware Implementation of Adaptive Median Filters},
   pages = {110--115},
   booktitle = {Proc. of 2008 IEEE Design and Diagnostics of Electronic
	Circuits and Systems Workshop},
   year = {2008},
   location = {Bratislava, SK},
   publisher = {IEEE Computer Society},
   ISBN = {978-1-4244-2276-0},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=8604}
}

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