Conference paper

ŠKARVADA Jaroslav, KOTÁSEK Zdeněk and HERRMAN Tomáš. Power Conscious RTL Test Scheduling. In: 4th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Znojmo: Masaryk University, 2008, pp. 265-265. ISBN 978-80-7355-082-0.
Publication language:english
Original title:Power Conscious RTL Test Scheduling
Title (cs):RTL plánování testu zohledňující příkon
Pages:265-265
Proceedings:4th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science
Conference:MEMICS'08 -- 4th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science
Place:Znojmo, CZ
Year:2008
ISBN:978-80-7355-082-0
Publisher:Masaryk University
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Keywords
RTL test scheduling, power consumption, circuit partitioning, testable blocks
Annotation

In the paper, a methodology for power conscious RTL test
scheduling is presented. At first the circuit under analysis (CUA) is mapped into technological library and partitioned. For each partition the sequences of test vectors are generated and if possible also reordered in order to reduce power consumption during the test application. For the test scheduling the Integer Linear Programming (ILP) model is used. The goal of the methodology is to find the test schedule with lowest test application time and with power consumption less than the allowed limit.

BibTeX:
@INPROCEEDINGS{
   author = {Jaroslav {\v{S}}karvada and Zden{\v{e}}k Kot{\'{a}}sek and
	Tom{\'{a}}{\v{s}} Herrman},
   title = {Power Conscious RTL Test Scheduling},
   pages = {265--265},
   booktitle = {4th Doctoral Workshop on Mathematical and Engineering
	Methods in Computer Science},
   year = {2008},
   location = {Znojmo, CZ},
   publisher = {Masaryk University},
   ISBN = {978-80-7355-082-0},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=8795}
}

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