Conference paper

TRMAČ Miloslav, HUSÁR Adam, HRANÁČ Jan, HRUŠKA Tomáš and MASAŘÍK Karel. Instructor Selector Generation from Architecture Description. In: 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2010, pp. 167-174. ISBN 978-80-87342-10-7.
Publication language:english
Original title:Instructor Selector Generation from Architecture Description
Title (cs):Generování selektoru instrukcí z popisu architektury
Pages:167-174
Proceedings:6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science
Conference:MEMICS'10 -- 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science
Place:Brno, CZ
Year:2010
ISBN:978-80-87342-10-7
Publisher:Masaryk University
Keywords
compiler, instruction selection, LLVM, ISAC
Annotation
We describe an automated way to generate data for a practical LLVM instruction selector based on machine-generated description of the target architecture at register transfer level.

The generated instruction selector can handle arbitrarily complex machine instructions with no internal control flow, and can automatically find and take advantage of arithmetic properties of an instructions, specialized
pseudo-registers and special cases of immediate operands.
BibTeX:
@INPROCEEDINGS{
   author = {Miloslav Trma{\v{c}} and Adam Hus{\'{a}}r and Jan
	Hran{\'{a}}{\v{c}} and Tom{\'{a}}{\v{s}} Hru{\v{s}}ka and
	Karel Masa{\v{r}}{\'{i}}k},
   title = {Instructor Selector Generation from Architecture Description},
   pages = {167--174},
   booktitle = {6th Doctoral Workshop on Mathematical and Engineering
	Methods in Computer Science},
   year = {2010},
   location = {Brno, CZ},
   publisher = {Masaryk University},
   ISBN = {978-80-87342-10-7},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=9518}
}

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