Publication Details

Test Time Reduction by Scan Chain Reordering

BARTOŠ Pavel. Test Time Reduction by Scan Chain Reordering. In: Proceedings of the 17th Conference STUDENT EEICT 2011. Volume 3. Brno: Faculty of Electrical Engineering and Communication BUT, 2011, pp. 564-568. ISBN 978-80-214-4273-3.
Czech title
Zkracování doby aplikace testu změnou pořadí registrů v řetězci scan
Type
conference paper
Language
english
Authors
Bartoš Pavel, Ing. (DCSY FIT BUT)
Keywords

scan chain, reorganization, reordering, physical layout, fault, diagnostics, test

Abstract

In this paper, methodology for scan chain optimisation performed after physical layout is presented. It is shown how the methodology can be used to decrease test time of component under test if scan chain is reorganized. The  principles of the methodology are based on eliminating some types of faults in the physical layout and subsequent reduction of the number of test vectors needed to test the scan chain. As a result, component test application time is decreased. The methodology was verified on several circuits, experimental results are provided and discussed. It is expected that the results of our methodology can be used in mass production of electronic components where any reduction of test time is of great importance.

Published
2011
Pages
564-568
Proceedings
Proceedings of the 17th Conference STUDENT EEICT 2011
Series
Volume 3
Conference
Student EEICT 2011, Brno, CZ
ISBN
978-80-214-4273-3
Publisher
Faculty of Electrical Engineering and Communication BUT
Place
Brno, CZ
BibTeX
@INPROCEEDINGS{FITPUB9584,
   author = "Pavel Barto\v{s}",
   title = "Test Time Reduction by Scan Chain Reordering",
   pages = "564--568",
   booktitle = "Proceedings of the 17th Conference STUDENT EEICT 2011",
   series = "Volume 3",
   year = 2011,
   location = "Brno, CZ",
   publisher = "Faculty of Electrical Engineering and Communication BUT",
   ISBN = "978-80-214-4273-3",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/9584"
}
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