HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware
Authors:Šimková Marcela, Lengál Ondřej, Kajan Michal
Type:software
Created:2012
Licence:required - no fee
Keywords:functional verification, SystemVerilog, FPGA, acceleration, NetCOPE
Description:
A framework compliant with current prevalent functional verification methodologies (OVM, UVM) that enables to accelerate functional verification of hardware components in an FPGA environment, thus significantly increasing performance of verification.
Location:
The tool is available at http://www.fit.vutbr.cz/~isimkova/haven/
Research groups:
Departments:
Licence terms:
Free software under the terms of GNU GPL (cf. http://www.gnu.org/licenses/gpl.html).