Language and development environment for microprocessor design

Czech title:Jazyk a vývojové prostředí pro návrh mikroprocesoru
Reseach leader:Kurečka Radomír (ApS Brno)
Team leaders:Hruška Tomáš
Team members:Masařík Karel
Agency:Ministry of Industry and Trade of the Czech Republic
Keywords:HW/SW co-design, embedded system, mikroprocessor, SoC, ASIP, ISAC
The project Language and development environment for microprocessor design is focused on the research of the language for description of microprocessor and methods for transformation of microprocessor's model.

These methods will be used for design of support software tools which would make the development more efficient and in some aspects fully automatized. The goal is to create language and software environment which make complete development of microprocessor in most efficient way and shortest time possible. The support of creating of the microprocessor's model using developing graphical tool is connected with this task.


2008Lissom tools for simulation of Application Specific Instruction-set Processors, software, 2008
Authors: Hruška Tomáš, Masařík Karel, Kolář Dušan, Přikryl Zdeněk
2007Instruction Set Tools Lissom, software, 2007
Authors: Hruška Tomáš, Kolář Dušan, Lukáš Roman, Masařík Karel


2011PŘIKRYL Zdeněk. Advanced Methods of Microprocessor Simulation. Information Sciences and Technologies Bulletin of the ACM Slovakia. Bratislava: Vydavateľstvo STU, 2011, vol. 3, no. 3, pp. 1-13. ISSN 1338-1237.
2010HUSÁR Adam, HRUŠKA Tomáš, MASAŘÍK Karel and PŘIKRYL Zdeněk. Instruction Pipeline Modeling using Petri Nets. In: Proceedings of the International Workshop on Petri Nets and Software Engineering - PNSE'10. Universität Hamburg: Technical Universityt Hamburg-Harburg, 2010, pp. 163-164. ISBN 978-972-8692-55-1.
 HUSÁR Adam, HRUŠKA Tomáš, TRMAČ Miloslav and PŘIKRYL Zdeněk. Instruction Selection Patterns Extraction from Architecture Specification Language ISAC. In: Proceedings of the 16th Conference Student EEICT 2010 Volume 5. Brno: Faculty of Information Technology BUT, 2010, pp. 166-170. ISBN 978-80-214-4080-7.
 KŘOUSTEK Jakub and ŽIDEK Stanislav. Generating Proper VLIW Assembler Code Using Scattered Context Grammars. In: Proceedings of the 16th Conference Student EEICT 2010 Volume 5. Brno: Faculty of Information Technology BUT, 2010, pp. 181-185. ISBN 978-80-214-4080-7.
 KŘOUSTEK Jakub, ŽIDEK Stanislav, KOLÁŘ Dušan and MEDUNA Alexander. Exploitation of Scattered Context Grammars to Model VLIW Instruction Constraints. In: Proceedings of the 12th Biennial Baltic Electronics Conference. Tallinn: Institute of Electrical and Electronics Engineers, 2010, pp. 165-168. ISBN 978-1-4244-7357-1.
2009HUSÁR Adam, PŘIKRYL Zdeněk, MASAŘÍK Karel and HRUŠKA Tomáš. ASIP Design using Architecture Description Language ISAC. In: ACACES 2009 - Poster Abstracts. Ghent: High Performance and Embedded Architecture and Compilation, 2009, pp. 137-139. ISBN 978-90-382-1467-2.
 KŘOUSTEK Jakub. Usage of Decompilation in Processor Architecture Modeling. In: Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems. Ostrava, 2009, pp. 64-67. ISBN 978-80-86840-47-5.
 PŘIKRYL Zdeněk and HRUŠKA Tomáš. Cycle Accurate Profiler for ASIPs. In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: Masaryk University, 2009, pp. 168-175. ISBN 978-80-87342-04-6.
 PŘIKRYL Zdeněk, MASAŘÍK Karel, HRUŠKA Tomáš and HUSÁR Adam. Fast Cycle-Accurate Interpreted Simulation. In: Tenth International Workshop on Microprocessor Test and Verification: Common Challenges and Solutions. Austin: IEEE Computer Society Press, 2009, pp. 9-14. ISBN 978-0-7695-4000-9.
2008HRUŠKA Tomáš, KOLÁŘ Dušan, LUKÁŠ Roman and ZÁMEČNÍKOVÁ Eva. Two-Way Coupled Finite Automaton and Its Usage in Translators. In: New Aspects of Circuits. Heraklion: World Scientific and Engineering Academy, 2008, pp. 445-449. ISBN 978-960-6766-82-4. ISSN 1790-5117.
 MASAŘÍK Karel. Systém pro souběžný návrh technického a programového vybavení počítačů. Brno: Faculty of Information Technology BUT, 2008. ISBN 978-80-214-3863-7.
 PŘIKRYL Zdeněk, HRUŠKA Tomáš and MASAŘÍK Karel. Distributed Simulation and Profiling of Multiprocessor Systems on a Chip. WSEAS Transactions on Circuits. Athens: World Scientific and Engineering Academy, 2008, vol. 7, no. 8, pp. 788-799. ISSN 1109-2734.
 PŘIKRYL Zdeněk, HRUŠKA Tomáš and MASAŘÍK Karel. Simulation of ASIP on SoC. In: New Aspects of Systems. Heraklion: World Scientific and Engineering Academy, 2008, pp. 192-197. ISBN 978-960-6766-83-1. ISSN 1790-2769.
2007KŘOUSTEK Jakub. Code Analysis and Transformation. In: Proceedings of the 13th Conference STUDENT EEICT 2007. Brno: Brno University of Technology, 2007, pp. 152-154. ISBN 978-80-214-3407-3.
 MASAŘÍK Karel and HRUŠKA Tomáš. Structural Equivalence between Architectural Descriptive and Hardware Languages. In: A proceedings volume from the 4th International Conference on Cybernetics and Information Technologies, Systems and Applications CITSA 2007. Florida: International Institute of Informacs and Systemics, 2007, pp. 40-45. ISBN 1-934272-10-8.
 MASAŘÍK Karel, HRUŠKA Tomáš, KOLÁŘ Dušan and LUKÁŠ Roman. Roční zpráva 2007 projektu FT-TA3/128 Jazyk a vývojové prostředí pro návrh mikroprocesoru. Brno: Department of Information Systems FIT BUT, 2007.
2006MASAŘÍK Karel and HRUŠKA Tomáš. UML as Architecture Description Language. In: MOSIS'06, Proceedings of 40th Conference "Modelling and Simulation of Systems". Ostrava, 2006, pp. 41-48. ISBN 80-86840-21-2.
 MASAŘÍK Karel and HRUŠKA Tomáš. UML IN DESIGN OF ASIP. In: A proceedings volume from the 3rd IFAC Workshop on Discrete-Event System Design DESDes'06. Zielona Gora: University of Zielona Gora, 2006, pp. 209-214. ISBN 83-7481-035-1.
 MASAŘÍK Karel, HRUŠKA Tomáš and KOLÁŘ Dušan. Language and Development Environment For Microprocessor Design Of Embedded Systems. In: Proceedings of IFAC Workshop on PROGRAMMABLE DEVICES and EMBEDDED SYSTEMS PDeS 2006. Brno: Faculty of Electrical Engineering and Communication BUT, 2006, pp. 120-125. ISBN 80-214-3130-X.