Projects

 

Systém pro programování a realizaci vestavěných systémů

Reseach leader:Masařík Karel
Team leaders:Hruška Tomáš
Agency:MPO ČR
Code:FR-TI1/038
Start:2009
End:2013

Products

2011Microprocessor ADOP, specimen, 2011
Authors: Hruška Tomáš, Masařík Karel, Přikryl Zdeněk, Husár Adam, Fujcik Lukáš, Pristach Marián

Publications

2013Charvát, L., Smrčka, A., Vojnar, T.: An Abstraction of Multi-Port Memories with Arbitrary Addressable Units, In: Proceedings of the 14th Computer Aided Systems Theory??, Las Palmas de Grand Canaria, ES, 2013, p. 1-9
 Šimková, M., Přikryl, Z., Hruška, T., Kotásek, Z.: Automated Functional Verification of Application Specific Instruction-set Processors, In: The IESS 2013 Proceedings, Heidelberg, DE, Springer, 2013, p. 1-10
2012Dolíhal, L., Hruška, T., Masařík, K.: Testing of an automatically generated compiler, Review of retargetable testing system, In: International Journal on Advances in Software, Vol. 2012, No. 1, US, p. 15-26, ISSN 1942-2628
 Dolíhal, L., Hruška, T., Masařík, K.: Usage of simulators in testing system, In: Industrial Simulation Conference, Brno, CZ, EUROSIS, 2012, p. 74-78, ISBN 978-90-77381-71-7
 Charvát, L., Smrčka, A., Vojnar, T.: Automatic Formal Correspondence Checking of ISA and RTL Microprocessor Description, In: Proceedings of the 13th International Workshop on Microprocessor Test and Verification (MTV 2012), Austin, TX, US, IEEE, 2012, p. 6-12, ISBN 978-1-4673-4441-8
2011Dolíhal, L., Hruška, T.: Porting of C library, Testing of generated compiler, In: InfoWare 2011, Luxembourg, LU, IARIA, 2011, p. 125-130, ISBN 978-1-61208-008-6
 Ďurfina, L., Křoustek, J., Zemek, P., Kolář, D., Hruška, T., Masařík, K., Meduna, A.: Design of a Retargetable Decompiler for a Static Platform-Independent Malware Analysis, In: The 5th International Conference on Information Security and Assurance, Brno, CZ, Springer, 2011, p. 72-86, ISBN 978-3-642-23140-7
 Ďurfina, L., Křoustek, J., Zemek, P., Kolář, D., Hruška, T., Masařík, K., Meduna, A.: Design of a Retargetable Decompiler for a Static Platform-Independent Malware Analysis, In: International Journal of Security and Its Applications, Vol. 5, No. 4, 2011, Daejeon, KR, p. 91-106, ISSN 1738-9976
 Křoustek, J., Přikryl, Z., Kolář, D., Hruška, T.: Retargetable Multi-level Debugging in HW/SW Codesign, In: The 23rd International Conference on Microelectronics (ICM 2011), Hammamet, TN, IEEE, 2011, p. 1-6, ISBN 978-1-4577-2209-7
 Křoustek, J., Židek, S., Kolář, D., Meduna, A.: Scattered Context Grammars with Priority, In: International Journal of Advanced Research in Computer Science, Vol. 2, No. 4, 2011, Udaipur, IN, p. 1-6, ISSN 0976-5697
 Přikryl, Z., Křoustek, J., Hruška, T., Kolář, D., Masařík, K., Husár, A.: Design and Simulation of High Performance Parallel Architectures Using the ISAC Language, In: GSTF International Journal on Computing, Vol. 1, No. 2, 2011, Singapur, SG, p. 97-106, ISSN 2010-2283
 Přikryl, Z., Křoustek, J., Hruška, T., Kolář, D.: Fast Just-In-Time Translated Simulator for ASIP Design, In: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Cottbus, DE, IEEE CS, 2011, p. 279-282, ISBN 978-1-4244-9753-9
 Přikryl, Z., Křoustek, J., Hruška, T., Kolář, D.: Fast Translated Simulation of ASIPs, In: OpenAccess Series in Informatics (OASIcs), Vol. 16, No. 1, 2011, Wadern, DE, p. 93-100, ISSN 2190-6807
 Přikryl, Z.: Advanced Methods of Microprocessor Simulation, In: Information Sciences and Technologies Bulletin of the ACM Slovakia, Vol. 3, No. 3, 2011, Bratislava, SK, p. 1-13, ISSN 1338-1237
2010Husár, A., Hruška, T., Masařík, K., Přikryl, Z.: Instruction Pipeline Modeling using Petri Nets, In: Proceedings of the International Workshop on Petri Nets and Software Engineering - PNSE'10, Universität Hamburg, DE, TU-HH, 2010, p. 163-164, ISBN 978-972-8692-55-1
 Husár, A., Hruška, T., Trmač, M., Přikryl, Z.: Instruction Selection Patterns Extraction from Architecture Specification Language ISAC, In: Proceedings of the 16th Conference Student EEICT 2010 Volume 5, Brno, CZ, FIT VUT, 2010, p. 166-170, ISBN 978-80-214-4080-7
 Husár, A., Trmač, M., Hranáč, J., Hruška, T., Masařík, K., Kolář, D., Přikryl, Z.: Automatic C Compiler Generation from Architecture Description Language ISAC, In: 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, MUNI, 2010, p. 84-91, ISBN 978-80-87342-10-7
 Křoustek, J., Židek, S., Kolář, D., Meduna, A.: Exploitation of Scattered Context Grammars to Model VLIW Instruction Constraints, In: Proceedings of the 12th Biennial Baltic Electronics Conference, Tallinn, EE, IEEE, 2010, p. 165-168, ISBN 978-1-4244-7357-1
 Křoustek, J., Židek, S.: Generating Proper VLIW Assembler Code Using Scattered Context Grammars, In: Proceedings of the 16th Conference Student EEICT 2010 Volume 5, Brno, CZ, FIT VUT, 2010, p. 181-185, ISBN 978-80-214-4080-7
 Přikryl, Z., Hruška, T., Masařík, K., Husár, A.: Fast Cycle-Accurate Compiled Simulator, In: 10th IFAC Workshop on Programmable Devices and Embedded Systems, PDeS 2010, Pszczyna, PL, IFAC, 2010, p. 97-102, ISBN 978-3-902661-95-1, ISSN 1474-6670
 Přikryl, Z., Husár, A., Hruška, T., Masařík, K.: ASIP Design in the Lissom Project, In: ACACES 2010 - Poster Abstracts, Ghent, BE, HiPEAC, 2010, p. 105-108, ISBN 978-90-382-1631-7
 Přikryl, Z., Křoustek, J., Hruška, T., Kolář, D., Masařík, K., Husár, A.: Design and Debugging of Parallel Architectures Using the ISAC Language, In: Proceedings ot the Annual International Conference on Advanced Distributed and Parallel Computing and Real-Time and Embedded Systems, Singapore, SG, GSTF, 2010, p. 213-221, ISBN 978-981-08-7656-2
 Přikryl, Z., Křoustek, J., Hruška, T., Kolář, D.: Fast Translated Simulation of ASIPs, In: 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, MUNI, 2010, p. 135-142, ISBN 978-80-87342-10-7
 Přikryl, Z., Masařík, K., Hruška, T., Husár, A.: Generated Cycle-Accurate Profiler for C Language, In: 13th EUROMICRO Conference on Digital System Design, DSD'2010, Lille, FR, IEEE CS, 2010, p. 263-268, ISBN 978-0-7695-4171-6
 Trmač, M., Husár, A., Hranáč, J., Hruška, T., Masařík, K.: Instructor Selector Generation from Architecture Description, In: 6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, MUNI, 2010, p. 167-174, ISBN 978-80-87342-10-7
2009Husár, A., Přikryl, Z., Masařík, K., Hruška, T.: ASIP Design using Architecture Description Language ISAC, In: ACACES 2009 - Poster Abstracts, Ghent, BE, HiPEAC, 2009, p. 137-139, ISBN 978-90-382-1467-2
 Křoustek, J.: Code Analysis and Transformation To a High-Level Language, In: Proceedings of the 15th Conference STUDENT EEICT 2009, Brno, CZ, VUT v Brně, 2009, p. 196-198, ISBN 978-80-214-3868-2
 Křoustek, J.: Usage of Decompilation in Processor Architecture Modeling, In: Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems, Ostrava, CZ, MARQ, 2009, p. 64-67, ISBN 978-80-86840-47-5
 Přikryl, Z., Hruška, T.: Cycle Accurate Profiler for ASIPs, In: 5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, Brno, CZ, MUNI, 2009, p. 168-175, ISBN 978-80-87342-04-6
 Přikryl, Z., Masařík, K., Hruška, T., Husár, A.: Fast Cycle-Accurate Interpreted Simulation, In: Tenth International Workshop on Microprocessor Test and Verification: Common Challenges and Solutions, Austin, US, ICSP, 2009, p. 9-14, ISBN 978-0-7695-4000-9