Článek ve sborníku konference

 
Smrčka, A.: Towards Hardware Verification, In: Proceedings of the 11th Conference Student EEICT 2005, Brno, CZ, FIT VUT, 2005, s. 668-672, ISBN 978-80-214-2890-4
Jazyk publikace:angličtina
Název publikace:Towards Hardware Verification
Název (cs):Towards Hardware Verification
Strany:668-672
Sborník:Proceedings of the 11th Conference Student EEICT 2005
Konference:STUDENT EEICT 2005
Řada knih:Volume 3
Místo vydání:Brno, CZ
Rok:2005
ISBN:978-80-214-2890-4
Vydavatel:Fakulta informačních technologií VUT v Brně
URL:http://www.fit.vutbr.cz/~smrcka/publications/thv05.pdf [PDF]
Klíčová slova
formal verification, hardware verification, abstract model verification, verification of implementation
Anotace
This paper gives an introduction to the approach of verification of discrete timed hardware design. It roughly offers low-level verification hand in hand
with high-level verification (which is described in more detail). The main part of this paper takes an example of the top of view verification of the lookup processor as a part of the COMBO cards developed by Liberouter project.
BibTeX:
@INPROCEEDINGS{
   author = {Aleš Smrčka},
   title = {Towards Hardware Verification},
   pages = {668--672},
   booktitle = {Proceedings of the 11th Conference Student EEICT 2005},
   series = {Volume 3},
   year = {2005},
   location = {Brno, CZ},
   publisher = {Faculty of Information Technology BUT},
   ISBN = {978-80-214-2890-4},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=7767}
}