Conference paperHRBÁČEK Radek, MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Automatic Design of Approximate Circuits by Means of Multi-Objective Evolutionary Algorithms. In: Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era. Istanbul: Istanbul Sehir University, 2016, pp. 239-244. ISBN 978-1-5090-0335-8. | Publication language: | english |
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Original title: | Automatic Design of Approximate Circuits by Means of Multi-Objective Evolutionary Algorithms |
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Title (cs): | Automatický návrh přibližných obvodů pomocí multikriterilních evolučních algoritmů |
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Pages: | 239-244 |
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Proceedings: | Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era |
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Conference: | 11th International Conference on Design and Technology of Integrated Systems in Nanoscale Era |
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Place: | Istanbul, TR |
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Year: | 2016 |
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ISBN: | 978-1-5090-0335-8 |
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DOI: | 10.1109/DTIS.2016.7483885 |
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Publisher: | Istanbul Sehir University |
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Files: | |
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| Keywords |
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approximate computing, cartesian genetic programming, evolutionary algorithms, multi-objective optimization
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Annotation |
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Recently, power efficiency has become the most important parameter of
many real circuits. At the same time, a wide range of applications
capable of tolerating imperfections has spread out especially in
multimedia. Approximate computing, an emerging paradigm, takes advantage
of relaxed functionality requirements to make computer systems more
efficient in terms of energy consumption, speed or complexity. As a
result, a variety of trade-offs between error and efficiency can be
found. In this paper, a design method based on a multi-objective
evolutionary algorithm is proposed. For a given circuit, the method is
able to produce a set of Pareto optimal solutions in terms of the error,
power consumption and delay. The proposed design method uses Cartesian
Genetic Programming for the circuit representation and a modified
NSGA-II algorithm for design space exploration. The method is used to
design Pareto optimal approximate versions of arithmetic circuits such
as multipliers and adders. |
BibTeX: |
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@INPROCEEDINGS{
author = {Radek Hrb{\'{a}}{\v{c}}ek and Vojt{\v{e}}ch
Mr{\'{a}}zek and Zden{\v{e}}k
Va{\v{s}}{\'{i}}{\v{c}}ek},
title = {Automatic Design of Approximate Circuits by Means
of Multi-Objective Evolutionary Algorithms},
pages = {239--244},
booktitle = {Proceedings of the 11th International Conference on Design
\& Technology of Integrated Systems in Nanoscale Era},
year = {2016},
location = {Istanbul, TR},
publisher = {Istanbul Sehir University},
ISBN = {978-1-5090-0335-8},
doi = {10.1109/DTIS.2016.7483885},
language = {english},
url = {http://www.fit.vutbr.cz/research/view_pub.php.en?id=11080}
} |
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