| Dedek, T., Marek, T., Martínek, T.: High Level Abstraction Language as an Alternative to Embeded Processors for Internet Packet Processing in FPGA, In: 2007 International Conference on Field Programmable Logic and Applications, Amsterdam, US, IEEE CS, 2007, p. 648-651, ISBN 1-4244-1060-6 | | Publication language: | english |
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| Original title: | High Level Abstraction Language as an Alternative to Embeded Processors for Internet Packet Processing in FPGA |
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| Title (cs): | Vysokoúrovňový jazyk jako alternativa k vestavěným procesorům pro zpracování Internetového provozu |
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| Pages: | 648-651 |
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| Proceedings: | 2007 International Conference on Field Programmable Logic and Applications |
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| Conference: | The International Conference on Field Programmable Logic and Applications |
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| Place: | Amsterdam, US |
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| Year: | 2007 |
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| ISBN: | 1-4244-1060-6 |
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| Publisher: | IEEE Computer Society |
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| Keywords |
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Internet packet processing, Embeded processors, Handel-C, FPGA
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| Annotation |
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In this paper, we investigate three different realizations of the same block from different points of view. The mentioned different realizations include two realizations with embedded processors (custom 16-bit RISC processor and general soft-core processor) and the third realization uses Handel-C as an example of synthesisable high-level abstraction languages. The results show that development time of complete solution (HW and SW) is approximately the same for the Handel-C design and the design with soft-core processor; the development time of the Custom 16-bit RISC processor is about five times higher. Moreover, the throughput of the Handel-C design measured in the number of bits processed in one second is the highest. The obtained frequency and occupied area of the Handel-C design depends on the complexity of the used program. However, results are comparable or even better than results of the embedded processors. |
| BibTeX: |
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@INPROCEEDINGS{
author = {Tomáš Dedek and Tomáš Marek and Tomáš Martínek},
title = {High Level Abstraction Language as an Alternative to Embeded
Processors for Internet Packet Processing in FPGA},
pages = {648--651},
booktitle = {2007 International Conference on Field Programmable Logic
and Applications},
year = {2007},
location = {Amsterdam, US},
publisher = {IEEE Computer Society},
ISBN = {1-4244-1060-6},
language = {english},
url = {http://www.fit.vutbr.cz/research/view_pub.php?id=8413}
} |
|