Conference paper

PŘIKRYL, Z., KŘOUSTEK, J., HRUŠKA, T. and KOLÁŘ, D.. Fast Just-In-Time Translated Simulator for ASIP Design. In: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Cottbus: IEEE Computer Society, 2011, pp. 279-282. ISBN 978-1-4244-9753-9.
Publication language:english
Original title:Fast Just-In-Time Translated Simulation for ASIP Design
Title (cs):Rychlý Just-In-Time překládaný simulátor pro vývoj ASIPů
Pages:279-282
Proceedings:14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems
Conference:IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2011
Place:Cottbus, DE
Year:2011
ISBN:978-1-4244-9753-9
Publisher:IEEE Computer Society
Keywords
Architecture description languages, simulation, testing, application-specific instruction set processors
Annotation
The fast and accurate processor simulator is an essential tool for effective design of modern high-performance application-specific instruction set processors. The nowadays trend of ASIP design is focused on automatic simulator generation based on a processor description in an architecture description language. The simulator is used for testing and validation of designed processor or target application. Furthermore, the simulator can produce the profiling information. This information can aid design space exploration and the processor and target application optimization. In this paper, we present the concept of automatically generated just-in-time translated simulator with the profiling capabilities. This simulator is very fast, and it is generated in a short time. It can be even used for simulation of special applications, such as applications with self-modifying code or applications for systems with external memories. The experimental results can be found at the end of the paper.
BibTeX:
@INPROCEEDINGS{
   author = {Zdeněk Přikryl and Jakub Křoustek and Tomáš Hruška and Dušan
	Kolář},
   title = {Fast Just-In-Time Translated Simulation for ASIP Design},
   pages = {279--282},
   booktitle = {14th IEEE International Symposium on Design and Diagnostics
	of Electronic Circuits and Systems},
   year = {2011},
   location = {Cottbus, DE},
   publisher = {IEEE Computer Society},
   ISBN = {978-1-4244-9753-9},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php.en?id=9567}
}

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