Conference paper

 
Dvořák, V., Čejka, R.: A Choice of SM/DM Parallel ANN Implementation for Embedded Applications, In: Proceedings of the 7th IEEE International Conference on ECBS, Edinburgh, Scotland, GB, ICSP, 2000, p. 18-23, ISBN 0-7695-604-6
Publication language:english
Original title:A Choice of SM/DM Parallel ANN Implementation for Embedded Applications
Title (cs):Volba ANN SM/DM paralelní implementace pro vestavěné aplikace
Pages:18-23
Proceedings:Proceedings of the 7th IEEE International Conference on ECBS
Conference:7th IEEE International Conference and Workshop ECBS'2000
Place:Edinburgh, Scotland, GB
Year:2000
ISBN:0-7695-604-6
Publisher:IEEE Computer Society Press
Keywords
Multi-layer perceptron, shared and distributed memory, modeling, communicating sequential processes
Annotation
This paper examines implementations of a multi-layer perceptron (MLP) on bus-based shared memory (SM) and on distributed memory (DM) multiprocessor systems. The goal has been to optimize HW and SW architectures in order to obtain the fastest response possible. Prototyping parallel MLP algorithms for up to 8 processing nodes with the DM as well as SM memory was done using CSP-based TRANSIM tool. The results of prototyping MLPs of different sizes on various number of processing nodes demonstrate the feasible speedups, efficiency and time responses for the given CPU speed, link speed or bus bandwidth.
BibTeX:
@INPROCEEDINGS{
   author = {Václav Dvořák and Rudolf Čejka},
   title = {A Choice of SM/DM Parallel ANN Implementation for Embedded
	Applications},
   pages = {18--23},
   booktitle = {Proceedings of the 7th IEEE International Conference on ECBS},
   year = {2000},
   location = {Edinburgh, Scotland, GB},
   publisher = {IEEE Computer Society Press},
   ISBN = {0-7695-604-6},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=5585}
}