Conference paper

 
Zemčík, P., Fučík, O., Richter, M., Valenta, P.: Imaging Algorithm Speedup Using Co-Design, In: Summaries Volume Process Control 01, Štrbské Pleso, SK, FEI TU v Košiciach, 2001, p. 96-97, ISBN 80-227-1542-5
Publication language:english
Original title:Imaging Algorithm Speedup Using Co-Design
Title (cs):Urychlení algoritmů rastrového obrazu pomocí co-designu
Pages:96-97
Proceedings:Summaries Volume Process Control 01
Conference:PROCESS CONTROL 01
Place:Štrbské Pleso, SK
Year:2001
ISBN:80-227-1542-5
Publisher:Faculty of Electrical Engineering and Informatics, University of Technology Košice
Keywords
co-design, image processing, FPGA
Annotation
The contribution shows a possibility to speed up image processing algorithms using a suitable combination of DSP and FPGA and also demonstrates methods to distribute the computational tasks between the DSP and FPGA.
BibTeX:
@INPROCEEDINGS{
   author = {Pavel Zemčík and Otto Fučík and Miroslav Richter and Pavel
	Valenta},
   title = {Imaging Algorithm Speedup Using Co-Design},
   pages = {96--97},
   booktitle = {Summaries Volume Process Control 01},
   year = {2001},
   location = {Štrbské Pleso, SK},
   publisher = {Faculty of Electrical Engineering and Informatics,
	University of Technology Košice},
   ISBN = {80-227-1542-5},
   language = {english},
   url = {http://www.fit.vutbr.cz/research/view_pub.php?id=6782}
}