Thesis Details

Implementace kryptografických algoritmů v FPGA

Bachelor's Thesis Student: Foltýn Tomáš Academic Year: 2015/2016 Supervisor: Hanáček Petr, doc. Dr. Ing.
English title
Implementation of Cryptographic Algorithms in FPGA
Language
Czech
Abstract

This thesis describes design and implementation of the AES cryptographic algorithm in FPGA. Design of this unit aims at compact size in exchange for lower throughput. Implemented unit is able of both ciphering and deciphering with user selected key. Resulting design was tested in ModelSim program and on FITkit development board with Spartan 3 family FPGA.

Keywords

Cryptography, FPGA, AES, FITkit, VHDL

Department
Degree Programme
Information Technology
Files
Status
defended, grade C
Date
16 June 2016
Reviewer
Committee
Hanáček Petr, doc. Dr. Ing. (DITS FIT BUT), předseda
Burget Lukáš, doc. Ing., Ph.D. (DCGM FIT BUT), člen
Matoušek Petr, doc. Ing., Ph.D., M.A. (DIFS FIT BUT), člen
Peringer Petr, Dr. Ing. (DITS FIT BUT), člen
Vašíček Zdeněk, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Citation
FOLTÝN, Tomáš. Implementace kryptografických algoritmů v FPGA. Brno, 2016. Bachelor's Thesis. Brno University of Technology, Faculty of Information Technology. 2016-06-16. Supervised by Hanáček Petr. Available from: https://www.fit.vut.cz/study/thesis/8800/
BibTeX
@bachelorsthesis{FITBT8800,
    author = "Tom\'{a}\v{s} Folt\'{y}n",
    type = "Bachelor's thesis",
    title = "Implementace kryptografick\'{y}ch algoritm\r{u} v FPGA",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2016,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/8800/"
}
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